linux-kernel - Re: [PATCH -next V10 09/10] riscv: stack: Support HAVE_SOFTIRQ_ON_OWN

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <87o7sew6ey.fsf@all.your.base.are.belong.to.us>
Date:   Thu, 08 Dec 2022 11:12:21 +0100
From:   Björn Töpel <bjorn@...nel.org>
To:     guoren@...nel.org, arnd@...db.de, guoren@...nel.org,
        palmer@...osinc.com, tglx@...utronix.de, peterz@...radead.org,
        luto@...nel.org, conor.dooley@...rochip.com, heiko@...ech.de,
        jszhang@...nel.org, lazyparser@...il.com, falcon@...ylab.org,
        chenhuacai@...nel.org, apatel@...tanamicro.com,
        atishp@...shpatra.org, palmer@...belt.com,
        paul.walmsley@...ive.com, mark.rutland@....com,
        zouyipeng@...wei.com, bigeasy@...utronix.de,
        David.Laight@...lab.com, chenzhongjin@...wei.com,
        greentime.hu@...ive.com, andy.chiu@...ive.com, ben@...adent.org.uk
Cc:     linux-arch@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-riscv@...ts.infradead.org, Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH -next V10 09/10] riscv: stack: Support
 HAVE_SOFTIRQ_ON_OWN_STACK

guoren@...nel.org writes:

> From: Guo Ren <guoren@...ux.alibaba.com>
>
> Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. The
> irq and softirq use the same independent irq_stack of percpu by time
> division multiplexing.
>
> Tested-by: Jisheng Zhang <jszhang@...nel.org>
> Signed-off-by: Guo Ren <guoren@...ux.alibaba.com>
> Signed-off-by: Guo Ren <guoren@...nel.org>
> ---
>  arch/riscv/Kconfig      |  7 ++++---
>  arch/riscv/kernel/irq.c | 33 +++++++++++++++++++++++++++++++++
>  2 files changed, 37 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 0a9d4bdc0338..bd4c4ae4cdc9 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -447,12 +447,13 @@ config FPU
>  	  If you don't know what to do here, say Y.
>  
>  config IRQ_STACKS
> -	bool "Independent irq stacks" if EXPERT
> +	bool "Independent irq & softirq stacks" if EXPERT
>  	default y
>  	select HAVE_IRQ_EXIT_ON_IRQ_STACK
> +	select HAVE_SOFTIRQ_ON_OWN_STACK

HAVE_IRQ_EXIT_ON_IRQ_STACK is used by softirq.c Shouldn't that be
selected introduced in this patch, instead of the previous one?

>  	help
> -	  Add independent irq stacks for percpu to prevent kernel stack overflows.
> -	  We may save some memory footprint by disabling IRQ_STACKS.
> +	  Add independent irq & softirq stacks for percpu to prevent kernel stack
> +	  overflows. We may save some memory footprint by disabling IRQ_STACKS.

Same comment from previous patch. Please use the same wording/config as
other archs.

>  endmenu # "Platform type"
>  
> diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c
> index 5d77f692b198..a6406da34937 100644
> --- a/arch/riscv/kernel/irq.c
> +++ b/arch/riscv/kernel/irq.c
> @@ -11,6 +11,7 @@
>  #include <linux/seq_file.h>
>  #include <asm/smp.h>
>  #include <asm/vmap_stack.h>
> +#include <asm/softirq_stack.h>
>  
>  #ifdef CONFIG_IRQ_STACKS
>  static DEFINE_PER_CPU(ulong *, irq_stack_ptr);
> @@ -38,6 +39,38 @@ static void init_irq_stacks(void)
>  		per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu);
>  }
>  #endif /* CONFIG_VMAP_STACK */
> +
> +#ifdef CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK
> +void do_softirq_own_stack(void)
> +{
> +#ifdef CONFIG_IRQ_STACKS
> +	if (on_thread_stack()) {
> +		ulong *sp = per_cpu(irq_stack_ptr, smp_processor_id())
> +					+ IRQ_STACK_SIZE/sizeof(ulong);
> +		__asm__ __volatile(
> +		"addi	sp, sp, -"RISCV_SZPTR  "\n"
> +		REG_S"  ra, (sp)		\n"
> +		"addi	sp, sp, -"RISCV_SZPTR  "\n"
> +		REG_S"  s0, (sp)		\n"
> +		"addi	s0, sp, 2*"RISCV_SZPTR "\n"
> +		"move	sp, %[sp]		\n"
> +		"call	__do_softirq		\n"
> +		"addi	sp, s0, -2*"RISCV_SZPTR"\n"
> +		REG_L"  s0, (sp)		\n"
> +		"addi	sp, sp, "RISCV_SZPTR   "\n"
> +		REG_L"  ra, (sp)		\n"
> +		"addi	sp, sp, "RISCV_SZPTR   "\n"
> +		:
> +		: [sp] "r" (sp)
> +		: "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
> +		  "t0", "t1", "t2", "t3", "t4", "t5", "t6",
> +		  "memory");

Same as previous patch. Please avoid C&P and have a look at how
call_on_stack is done on x86.


Björn