linux-kernel - Re: [PATCH v4 4/8] mfd: intel-m10-bmc: Support multiple CSR register layouts

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Message-ID: <Y5gPw0NBA6CbD9JK@yilunxu-OptiPlex-7050>
Date:   Tue, 13 Dec 2022 13:38:11 +0800
From:   Xu Yilun <yilun.xu@...el.com>
To:     Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc:     linux-fpga@...r.kernel.org, Wu Hao <hao.wu@...el.com>,
        Tom Rix <trix@...hat.com>, Moritz Fischer <mdf@...nel.org>,
        Lee Jones <lee@...nel.org>,
        Matthew Gerlach <matthew.gerlach@...ux.intel.com>,
        Russ Weight <russell.h.weight@...el.com>,
        Tianfei zhang <tianfei.zhang@...el.com>,
        Mark Brown <broonie@...nel.org>,
        Greg KH <gregkh@...uxfoundation.org>,
        Marco Pagani <marpagan@...hat.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 4/8] mfd: intel-m10-bmc: Support multiple CSR register
 layouts

On 2022-12-11 at 12:39:09 +0200, Ilpo Järvinen wrote:
> There are different addresses for the MAX10 CSR registers. Introducing
> a new data structure m10bmc_csr_map for the register definition of
> MAX10 CSR.
> 
> Provide the csr_map for SPI.
> 
> Co-developed-by: Tianfei zhang <tianfei.zhang@...el.com>
> Signed-off-by: Tianfei zhang <tianfei.zhang@...el.com>
> Reviewed-by: Russ Weight <russell.h.weight@...el.com>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>

Reviewed-by: Xu Yilun <yilun.xu@...el.com>