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Message-ID: <Y5gRII0QLyX5Dl7k@yilunxu-OptiPlex-7050>
Date:   Tue, 13 Dec 2022 13:44:00 +0800
From:   Xu Yilun <yilun.xu@...el.com>
To:     Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc:     linux-fpga@...r.kernel.org, Wu Hao <hao.wu@...el.com>,
        Tom Rix <trix@...hat.com>, Moritz Fischer <mdf@...nel.org>,
        Lee Jones <lee@...nel.org>,
        Matthew Gerlach <matthew.gerlach@...ux.intel.com>,
        Russ Weight <russell.h.weight@...el.com>,
        Tianfei zhang <tianfei.zhang@...el.com>,
        Mark Brown <broonie@...nel.org>,
        Greg KH <gregkh@...uxfoundation.org>,
        Marco Pagani <marpagan@...hat.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 5/8] fpga: intel-m10-bmc: Rework flash read/write

On 2022-12-11 at 12:39:10 +0200, Ilpo Järvinen wrote:
> Access to flash staging area is different for N6000 from that of the
> SPI interfaced counterparts. To make it easier to differentiate flash
> access path, move read/write into new functions where the new access
> path can be easily placed into. Rework the unaligned access such the
> behavior it matches for both read and write.
> 
> This change also renames m10bmc_sec_write() to m10bmc_sec_fw_write() as
> it would have a name conflict otherwise.
> 
> Co-developed-by: Tianfei zhang <tianfei.zhang@...el.com>
> Signed-off-by: Tianfei zhang <tianfei.zhang@...el.com>
> Co-developed-by: Russ Weight <russell.h.weight@...el.com>
> Signed-off-by: Russ Weight <russell.h.weight@...el.com>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>

Acked-by: Xu Yilun <yilun.xu@...el.com>

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