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Message-ID: <20221215101353.GA36097@ediswmail.ad.cirrus.com>
Date:   Thu, 15 Dec 2022 10:13:53 +0000
From:   Charles Keepax <ckeepax@...nsource.cirrus.com>
To:     Lukasz Majewski <lukma@...x.de>
CC:     Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Jaroslav Kysela <perex@...ex.cz>,
        Takashi Iwai <tiwai@...e.com>, Stephen Kitt <steve@....org>,
        <patches@...nsource.cirrus.com>, <alsa-devel@...a-project.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/3] ASoC: wm8940: Rewrite code to set proper clocks

On Thu, Dec 15, 2022 at 10:36:14AM +0100, Lukasz Majewski wrote:
> This patch enables support for internal wm8940's PLL and proper
> divider to set proper value for 256x fs clock.
> 
> This approach is more flexible and replaces hardcoded clock
> values and makes the codec work with the simple-card driver.
> Card drivers calling set_pll() and set_clkdiv() directly are
> unaffected.
> 
> For the reference - code in this commit is based on:
> "ASoC: wm8974: configure pll and mclk divider automatically"
> (SHA1: 51b2bb3f2568e6d9d81a001d38b8d70c2ba4af99).

Minor nit this doesn't quite match the commit <12-chars of SHA>
("<description>") format in Submitting-patches.rst.

> 
> Signed-off-by: Lukasz Majewski <lukma@...x.de>
> ---

But the patch looks good to me:

Acked-by: Charles Keepax <ckeepax@...nsource.cirrus.com>

Thanks,
Charles

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