[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Y6B2e17sDuUxUgpY@black.fi.intel.com>
Date: Mon, 19 Dec 2022 16:34:35 +0200
From: Mika Westerberg <mika.westerberg@...ux.intel.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
Andy Shevchenko <andy@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>
Subject: Re: [PATCH v1 1/1] pinctrl: intel: Use same order of bit fields for
PADCFG2
On Mon, Dec 19, 2022 at 02:32:29PM +0200, Andy Shevchenko wrote:
> PADCFG0 and PADCFG1 are ordered from MSB to LSB, do the same
> for PADCFG2 bit fields.
Perhaps:
No functional changes.
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@...ux.intel.com>
Powered by blists - more mailing lists