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Message-ID: <016e9b47-35b4-2110-bbef-ddfd0abc6a8d@linaro.org>
Date: Mon, 2 Jan 2023 22:24:31 +0530
From: Bhupesh Sharma <bhupesh.sharma@...aro.org>
To: Konrad Dybcio <konrad.dybcio@...aro.org>,
linux-arm-msm@...r.kernel.org
Cc: quic_schowdhu@...cinc.com, agross@...nel.org, andersson@...nel.org,
linux-kernel@...r.kernel.org, bhupesh.linux@...il.com,
robh+dt@...nel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sm6115: Add EUD dt node and dwc3
connector
On 1/2/23 4:16 PM, Konrad Dybcio wrote:
>
>
> On 31.12.2022 14:19, Bhupesh Sharma wrote:
>> Add the Embedded USB Debugger(EUD) device tree node for
>> SM6115 / SM4250 SoC.
>>
>> The node contains EUD base register region and EUD mode
>> manager register regions along with the interrupt entry.
>>
>> Also add the typec connector node for EUD which is attached to
>> EUD node via port. EUD is also attached to DWC3 node via port.
>>
>> Cc: Souradeep Chowdhury <quic_schowdhu@...cinc.com>
>> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@...aro.org>
>> ---
>> - This patch is based on my earlier sm6115 usb related changes, which can
>> be seen here:
>> https://lore.kernel.org/linux-arm-msm/20221215094532.589291-1-bhupesh.sharma@linaro.org/
>> - This patch is also dependent on my sm6115 eud dt-binding and driver changes
>> sent earlier, which can be seen here:
>> https://lore.kernel.org/linux-arm-msm/20221231130743.3285664-1-bhupesh.sharma@linaro.org/
>>
>> arch/arm64/boot/dts/qcom/sm6115.dtsi | 37 ++++++++++++++++++++++++++++
>> 1 file changed, 37 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> index 030763187cc3f..c775f7fdb7015 100644
>> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
>> @@ -565,6 +565,37 @@ gcc: clock-controller@...0000 {
>> #power-domain-cells = <1>;
>> };
>>
>> + eud: eud@...0000 {
>> + compatible = "qcom,sm6115-eud","qcom,eud";
> Missing space between entries.
>
>> + reg = <0x01610000 0x2000>,
>> + <0x01612000 0x1000>,
>> + <0x003e5018 0x4>;
>> + interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
>> + ports {
> Newline before ports {}.
>
> Not sure if debugging hardware should be enabled by default..
>> + port@0 {
>> + eud_ep: endpoint {
>> + remote-endpoint = <&usb2_role_switch>;
>> + };
>> + };
> Newline between subsequent nodes.
>
>> + port@1 {
>> + eud_con: endpoint {
>> + remote-endpoint = <&con_eud>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + eud_typec: connector {
> Non-MMIO nodes don't belong under /soc.
>
>> + compatible = "usb-c-connector";
> Newline between properties and subnode.
>
>
>> + ports {
>> + port@0 {
>> + con_eud: endpoint {
>> + remote-endpoint = <&eud_con>;
>> + };
>> + };
>> + };
>> + };
>> +
>> usb_hsphy: phy@...3000 {
>> compatible = "qcom,sm6115-qusb2-phy";
>> reg = <0x01613000 0x180>;
>> @@ -1064,6 +1095,12 @@ usb_dwc3: usb@...0000 {
>> snps,has-lpm-erratum;
>> snps,hird-threshold = /bits/ 8 <0x10>;
>> snps,usb3_lpm_capable;
>> + usb-role-switch;
> Same here.
For all the above points, the format is same as suggested in [1] and
already used in existing dts [2].
[1].
https://www.kernel.org/doc/Documentation/devicetree/bindings/soc/qcom/qcom%2Ceud.yaml
[2].
https://github.com/torvalds/linux/blob/master/arch/arm64/boot/dts/qcom/sc7280.dtsi#L3587
> On a note, this commit + driver-side changes give me a:
>
> 1610000.eud qcom_eud: failed to get role switch
You need to set dr_mode = "otg", for 'usb_dwc3' to make the role switch
work.
Thanks,
Bhupesh
>> + port {
>> + usb2_role_switch: endpoint {
>> + remote-endpoint = <&eud_ep>;
>> + };
>> + };
>> };
>> };
>>
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