lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAH+2xPBAQ0vYfLNHSmVBt8hRotzot-Cs7OSEu+q2Bv3eA+5Nsg@mail.gmail.com>
Date:   Sat, 7 Jan 2023 18:01:55 +0100
From:   Bruno Thomsen <bruno.thomsen@...il.com>
To:     Hugo Villeneuve <hugo@...ovil.com>
Cc:     a.zummo@...ertech.it, alexandre.belloni@...tlin.com,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        linux-rtc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Hugo Villeneuve <hvilleneuve@...onoff.com>
Subject: Re: [PATCH v3 05/14] rtc: pcf2127: adapt for CLKOUT register at any offset

Den tor. 15. dec. 2022 kl. 16.19 skrev Hugo Villeneuve <hugo@...ovil.com>:
>
> From: Hugo Villeneuve <hvilleneuve@...onoff.com>
>
> This will simplify the implementation of new variants into this driver.
>
> Signed-off-by: Hugo Villeneuve <hvilleneuve@...onoff.com>

Reviewed-by: Bruno Thomsen <bruno.thomsen@...il.com>

> ---
>  drivers/rtc/rtc-pcf2127.c | 7 +++++--
>  1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
> index 5d8c06e32dce..38816ad065eb 100644
> --- a/drivers/rtc/rtc-pcf2127.c
> +++ b/drivers/rtc/rtc-pcf2127.c
> @@ -116,6 +116,7 @@ struct pcf21xx_config {
>         u8 regs_alarm_base; /* Alarm function base registers. */
>         u8 reg_wd_ctl; /* Watchdog control register. */
>         u8 reg_wd_val; /* Watchdog value register. */
> +       u8 reg_clkout; /* Clkout register. */
>  };
>
>  struct pcf2127 {
> @@ -668,6 +669,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
>                 .regs_alarm_base = PCF2127_REG_ALARM_BASE,
>                 .reg_wd_ctl = PCF2127_REG_WD_CTL,
>                 .reg_wd_val = PCF2127_REG_WD_VAL,
> +               .reg_clkout = PCF2127_REG_CLKOUT,
>         },
>         [PCF2129] = {
>                 .max_register = 0x19,
> @@ -677,6 +679,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
>                 .regs_alarm_base = PCF2127_REG_ALARM_BASE,
>                 .reg_wd_ctl = PCF2127_REG_WD_CTL,
>                 .reg_wd_val = PCF2127_REG_WD_VAL,
> +               .reg_clkout = PCF2127_REG_CLKOUT,
>         },
>  };
>
> @@ -756,12 +759,12 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
>         regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
>                                 PCF2127_BIT_CTRL1_POR_OVRD);
>
> -       ret = regmap_read(pcf2127->regmap, PCF2127_REG_CLKOUT, &val);
> +       ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_clkout, &val);
>         if (ret < 0)
>                 return ret;
>
>         if (!(val & PCF2127_BIT_CLKOUT_OTPR)) {
> -               ret = regmap_set_bits(pcf2127->regmap, PCF2127_REG_CLKOUT,
> +               ret = regmap_set_bits(pcf2127->regmap, pcf2127->cfg->reg_clkout,
>                                       PCF2127_BIT_CLKOUT_OTPR);
>                 if (ret < 0)
>                         return ret;
> --
> 2.30.2
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ