linux-kernel - Re: [PATCH v4 5/8] perf: arm_spe: Use new PMSIDR

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <c6b506d6-0dc8-8cc6-7260-804e341e5103@arm.com>
Date:   Tue, 10 Jan 2023 14:16:01 +0530
From:   Anshuman Khandual <anshuman.khandual@....com>
To:     Rob Herring <robh@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Marc Zyngier <maz@...nel.org>,
        James Morse <james.morse@....com>,
        Alexandru Elisei <alexandru.elisei@....com>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Oliver Upton <oliver.upton@...ux.dev>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>
Cc:     Mark Brown <broonie@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        kvmarm@...ts.linux.dev, linux-perf-users@...r.kernel.org,
        James Clark <james.clark@....com>
Subject: Re: [PATCH v4 5/8] perf: arm_spe: Use new PMSIDR_EL1 register enums



On 1/10/23 00:56, Rob Herring wrote:
> Now that the SPE register definitions include enums for some PMSIDR_EL1
> fields, use them in the driver in place of magic values.
> 
> Signed-off-by: Rob Herring <robh@...nel.org>

Reviewed-by: Anshuman Khandual <anshuman.khandual@....com>

> ---
> v4:
>  - Rebase on v6.2-rc1
> v3: New patch
> ---
>  drivers/perf/arm_spe_pmu.c | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/perf/arm_spe_pmu.c b/drivers/perf/arm_spe_pmu.c
> index 9b4bd72087ea..af6d3867c3e7 100644
> --- a/drivers/perf/arm_spe_pmu.c
> +++ b/drivers/perf/arm_spe_pmu.c
> @@ -1006,32 +1006,32 @@ static void __arm_spe_pmu_dev_probe(void *info)
>  	/* This field has a spaced out encoding, so just use a look-up */
>  	fld = FIELD_GET(PMSIDR_EL1_INTERVAL, reg);
>  	switch (fld) {
> -	case 0:
> +	case PMSIDR_EL1_INTERVAL_256:
>  		spe_pmu->min_period = 256;
>  		break;
> -	case 2:
> +	case PMSIDR_EL1_INTERVAL_512:
>  		spe_pmu->min_period = 512;
>  		break;
> -	case 3:
> +	case PMSIDR_EL1_INTERVAL_768:
>  		spe_pmu->min_period = 768;
>  		break;
> -	case 4:
> +	case PMSIDR_EL1_INTERVAL_1024:
>  		spe_pmu->min_period = 1024;
>  		break;
> -	case 5:
> +	case PMSIDR_EL1_INTERVAL_1536:
>  		spe_pmu->min_period = 1536;
>  		break;
> -	case 6:
> +	case PMSIDR_EL1_INTERVAL_2048:
>  		spe_pmu->min_period = 2048;
>  		break;
> -	case 7:
> +	case PMSIDR_EL1_INTERVAL_3072:
>  		spe_pmu->min_period = 3072;
>  		break;
>  	default:
>  		dev_warn(dev, "unknown PMSIDR_EL1.Interval [%d]; assuming 8\n",
>  			 fld);
>  		fallthrough;
> -	case 8:
> +	case PMSIDR_EL1_INTERVAL_4096:
>  		spe_pmu->min_period = 4096;
>  	}
>  
> @@ -1050,10 +1050,10 @@ static void __arm_spe_pmu_dev_probe(void *info)
>  		dev_warn(dev, "unknown PMSIDR_EL1.CountSize [%d]; assuming 2\n",
>  			 fld);
>  		fallthrough;
> -	case 2:
> +	case PMSIDR_EL1_COUNTSIZE_12_BIT_SAT:
>  		spe_pmu->counter_sz = 12;
>  		break;
> -	case 3:
> +	case PMSIDR_EL1_COUNTSIZE_16_BIT_SAT:
>  		spe_pmu->counter_sz = 16;
>  	}
>  
>