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Message-ID: <20230111032830.20447-3-jian.yang@mediatek.com>
Date: Wed, 11 Jan 2023 11:28:30 +0800
From: Jian Yang <jian.yang@...iatek.com>
To: Lorenzo Pieralisi <lpieralisi@...nel.org>,
Jianjun Wang <jianjun.wang@...iatek.com>,
Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Ryder Lee <ryder.lee@...iatek.com>,
Krzysztof WilczyĆski <kw@...ux.com>
CC: <linux-pci@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
<jian.yang@...iatek.com>, <chuanjia.liu@...iatek.com>,
<jieyy.yang@...iatek.com>, <qizhong.cheng@...iatek.com>,
<rex-bc.chen@...iatek.com>, <david-yh.chiu@...iatek.com>
Subject: [PATCH 2/2] dt-bindings: PCI: mediatek-gen3: Add support for controlling power and reset
From: "jian.yang" <jian.yang@...iatek.com>
Add new properties to support control power supplies and reset pin of
a downstream component.
Signed-off-by: jian.yang <jian.yang@...iatek.com>
---
.../bindings/pci/mediatek-pcie-gen3.yaml | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index 7e8c7a2a5f9b..46149cc63989 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -84,6 +84,29 @@ properties:
items:
enum: [ phy, mac ]
+ pcie1v8-supply:
+ description:
+ The regulator phandle that provides 1.8V power to downstream component.
+
+ pcie3v3-supply:
+ description:
+ The regulator phandle that provides 3.3V power to downstream component.
+
+ pcie12v-supply:
+ description:
+ The regulator phandle that provides 12V power to downstream component.
+
+ dsc-reset-gpios:
+ description:
+ The reset GPIO of a downstream component.
+ maxItems: 1
+
+ dsc-reset-msleep:
+ description:
+ The delay time between assertion and de-assertion of a downstream
+ component's reset GPIO.
+ maxItems: 1
+
clocks:
minItems: 4
maxItems: 6
--
2.18.0
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