linux-kernel - linux-next: manual merge of the cxl tree with the cxl-fixes tree

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Message-ID: <20230111131916.5dccc614@canb.auug.org.au>
Date:   Wed, 11 Jan 2023 13:19:16 +1100
From:   Stephen Rothwell <sfr@...b.auug.org.au>
To:     Dan Williams <dan.j.williams@...el.com>
Cc:     Dave Jiang <dave.jiang@...el.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux Next Mailing List <linux-next@...r.kernel.org>
Subject: linux-next: manual merge of the cxl tree with the cxl-fixes tree

Hi all,

Today's linux-next merge of the cxl tree got a conflict in:

  drivers/cxl/pci.c

between commit:

  2ec1b17f745b ("cxl: fix cxl_report_and_clear() RAS UE addr mis-assignment")

from the cxl-fixes tree and commit:

  4a20bc3e2074 ("cxl/pci: Move tracepoint definitions to drivers/cxl/core/")

from the cxl tree.

I fixed it up (I used this file from the latter and added the following
merge fix patch) and can carry the fix as necessary. This is now fixed
as far as linux-next is concerned, but any non trivial conflicts should
be mentioned to your upstream maintainer when your tree is submitted for
merging.  You may also want to consider cooperating with the maintainer
of the conflicting tree to minimise any particularly complex conflicts.

From: Stephen Rothwell <sfr@...b.auug.org.au>
Date: Wed, 11 Jan 2023 12:30:07 +1100
Subject: [PATCH] fix up for "cxl: fix cxl_report_and_clear() RAS UE addr mis-assignment"

Signed-off-by: Stephen Rothwell <sfr@...b.auug.org.au>
---
 drivers/cxl/core/pci.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/cxl/core/pci.c b/drivers/cxl/core/pci.c
index 1d1492440287..184ead6a2796 100644
--- a/drivers/cxl/core/pci.c
+++ b/drivers/cxl/core/pci.c
@@ -684,8 +684,11 @@ static bool cxl_report_and_clear(struct cxl_dev_state *cxlds)
 
 	/* If multiple errors, log header points to first error from ctrl reg */
 	if (hweight32(status) > 1) {
-		addr = cxlds->regs.ras + CXL_RAS_CAP_CONTROL_OFFSET;
-		fe = BIT(FIELD_GET(CXL_RAS_CAP_CONTROL_FE_MASK, readl(addr)));
+		void __iomem *rcc_addr =
+			cxlds->regs.ras + CXL_RAS_CAP_CONTROL_OFFSET;
+
+		fe = BIT(FIELD_GET(CXL_RAS_CAP_CONTROL_FE_MASK,
+				   readl(rcc_addr)));
 	} else {
 		fe = status;
 	}
-- 
2.35.1

-- 
Cheers,
Stephen Rothwell

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