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Date: Fri, 13 Jan 2023 04:14:01 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: linux-arm-msm@...r.kernel.org, andersson@...nel.org,
agross@...nel.org, krzysztof.kozlowski@...aro.org
Cc: marijn.suijten@...ainline.org,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Amit Kucheria <amitk@...nel.org>,
Thara Gopinath <thara.gopinath@...il.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Zhang Rui <rui.zhang@...el.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...ainline.org>,
Loic Poulain <loic.poulain@...aro.org>,
Stephan Gerhold <stephan@...hold.net>,
linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org
Subject: [PATCH 2/2] firmware: qcom_scm: Fully implement qcom_scm_lmh_dcvsh()
The qcom_scm_lmh_dcvsh call can actually pass two values to the
secure world. The second value is used for example with the
LMH_FREQ_CAP function, which limits the maximum achievable frequency
directly from LMh. Add the missing arguments, handle them and update
the current usages of this function.
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
drivers/firmware/qcom_scm.c | 13 ++++++++-----
drivers/thermal/qcom/lmh.c | 28 ++++++++++++++--------------
include/linux/qcom_scm.h | 5 +++--
3 files changed, 25 insertions(+), 21 deletions(-)
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index cdbfe54c8146..58a19a47e442 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -1252,12 +1252,13 @@ int qcom_scm_lmh_profile_change(u32 profile_id)
}
EXPORT_SYMBOL(qcom_scm_lmh_profile_change);
-int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
- u64 limit_node, u32 node_id, u64 version)
+int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val0,
+ u32 payload_val1, u64 limit_node, u32 node_id,
+ u64 version, bool has_val1)
{
dma_addr_t payload_phys;
u32 *payload_buf;
- int ret, payload_size = 5 * sizeof(u32);
+ int ret, payload_size = (5 + has_val1) * sizeof(u32);
struct qcom_scm_desc desc = {
.svc = QCOM_SCM_SVC_LMH,
@@ -1278,8 +1279,10 @@ int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
payload_buf[0] = payload_fn;
payload_buf[1] = 0;
payload_buf[2] = payload_reg;
- payload_buf[3] = 1;
- payload_buf[4] = payload_val;
+ payload_buf[3] = has_val1 ? 2 : 1;
+ payload_buf[4] = payload_val0;
+ if (has_val1)
+ payload_buf[5] = payload_val1;
desc.args[0] = payload_phys;
diff --git a/drivers/thermal/qcom/lmh.c b/drivers/thermal/qcom/lmh.c
index 5e8ff196c9a6..d2b5ea8322eb 100644
--- a/drivers/thermal/qcom/lmh.c
+++ b/drivers/thermal/qcom/lmh.c
@@ -147,23 +147,23 @@ static int lmh_probe(struct platform_device *pdev)
return -EINVAL;
if (flags & LMH_ENABLE_ALGOS) {
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1,
- LMH_NODE_DCVS, node_id, 0);
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_CRNT, LMH_ALGO_MODE_ENABLE, 1, 0,
+ LMH_NODE_DCVS, node_id, 0, false);
if (ret)
dev_err(dev, "Error %d enabling current subfunction\n", ret);
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1,
- LMH_NODE_DCVS, node_id, 0);
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_REL, LMH_ALGO_MODE_ENABLE, 1, 0,
+ LMH_NODE_DCVS, node_id, 0, false);
if (ret)
dev_err(dev, "Error %d enabling reliability subfunction\n", ret);
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1,
- LMH_NODE_DCVS, node_id, 0);
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_BCL, LMH_ALGO_MODE_ENABLE, 1, 0,
+ LMH_NODE_DCVS, node_id, 0, false);
if (ret)
dev_err(dev, "Error %d enabling BCL subfunction\n", ret);
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1,
- LMH_NODE_DCVS, node_id, 0);
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_ALGO_MODE_ENABLE, 1, 0,
+ LMH_NODE_DCVS, node_id, 0, false);
if (ret) {
dev_err(dev, "Error %d enabling thermal subfunction\n", ret);
return ret;
@@ -177,22 +177,22 @@ static int lmh_probe(struct platform_device *pdev)
}
/* Set default thermal trips */
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_ARM_THRESHOLD, temp_arm,
- LMH_NODE_DCVS, node_id, 0);
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_ARM_THRESHOLD, temp_arm, 0,
+ LMH_NODE_DCVS, node_id, 0, false);
if (ret) {
dev_err(dev, "Error setting thermal ARM threshold%d\n", ret);
return ret;
}
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_HI_THRESHOLD, temp_high,
- LMH_NODE_DCVS, node_id, 0);
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_HI_THRESHOLD, temp_high, 0,
+ LMH_NODE_DCVS, node_id, 0, false);
if (ret) {
dev_err(dev, "Error setting thermal HI threshold%d\n", ret);
return ret;
}
- ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_LOW_THRESHOLD, temp_low,
- LMH_NODE_DCVS, node_id, 0);
+ ret = qcom_scm_lmh_dcvsh(LMH_SUB_FN_THERMAL, LMH_TH_LOW_THRESHOLD, temp_low, 0,
+ LMH_NODE_DCVS, node_id, 0, false);
if (ret) {
dev_err(dev, "Error setting thermal ARM threshold%d\n", ret);
return ret;
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index 1e449a5d7f5c..9fd798d17fdd 100644
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -117,8 +117,9 @@ extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
extern int qcom_scm_iommu_set_pt_format(u32 sec_id, u32 ctx_num, u32 pt_fmt);
extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en);
-extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val,
- u64 limit_node, u32 node_id, u64 version);
+extern int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val0,
+ u32 payload_val1, u64 limit_node, u32 node_id,
+ u64 version, bool has_val1);
extern int qcom_scm_lmh_profile_change(u32 profile_id);
extern bool qcom_scm_lmh_dcvsh_available(void);
--
2.39.0
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