linux-kernel - [PATCH 3/5] EDAC/i10nm: Add Intel Emerald Rapids server support

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Message-Id: <20230113032802.41752-4-qiuxu.zhuo@intel.com>
Date:   Fri, 13 Jan 2023 11:28:00 +0800
From:   Qiuxu Zhuo <qiuxu.zhuo@...el.com>
To:     Tony Luck <tony.luck@...el.com>
Cc:     Qiuxu Zhuo <qiuxu.zhuo@...el.com>, Borislav Petkov <bp@...en8.de>,
        Aristeu Rozanski <aris@...hat.com>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Youquan Song <youquan.song@...el.com>,
        Li Zhang <li4.zhang@...el.com>, linux-edac@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH 3/5] EDAC/i10nm: Add Intel Emerald Rapids server support

The Emerald Rapids CPU model uses similar memory controller registers
as Sapphire Rapids server. Add Emerald Rapids CPU model number ID for
EDAC support.

Tested-by: Li Zhang <li4.zhang@...el.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@...el.com>
---
 drivers/edac/i10nm_base.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index 65aeea53e2df..e11726f7fe36 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -637,6 +637,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = {
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X,		X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_D,		X86_STEPPINGS(0x0, 0xf), &i10nm_cfg1),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),
+	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),
 	{}
 };
 MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);
-- 
2.17.1