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Message-ID: <Y8dAUqRglBphxjQb@linaro.org>
Date:   Wed, 18 Jan 2023 02:41:54 +0200
From:   Abel Vesa <abel.vesa@...aro.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        "vkoul@...nel.org" <vkoul@...nel.org>,
        Kishon Vijay Abraham I <kishon@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        devicetree@...r.kernel.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Johan Hovold <johan@...nel.org>
Subject: Re: [PATCH v2 0/7] phy: qualcomm: Add PCIe support for SM8550

On 23-01-18 02:38:27, Abel Vesa wrote:
> This patchset relies on the following patchset:
> https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/
> 
> The v1 of this patchset is:
> https://lore.kernel.org/all/20221116120157.2706810-1-abel.vesa@linaro.org/
> 

Please ignore this version. I missed the bindings update patch.

> Changes since v1:
>  * dropped all PCIe unrelated patches and also register offsets
>  * split all the offsets into separate patches, like Vinod suggested
>  * dropped the legacy dt parse changes since we intend to support
>    only the new dt parse mechanism from now on
> 
> Abel Vesa (7):
>   phy: qcom-qmp: pcs: Add v6 register offsets
>   phy: qcom-qmp: pcs: Add v6.20 register offsets
>   phy: qcom-qmp: pcs-pcie: Add v6 register offsets
>   phy: qcom-qmp: pcs-pcie: Add v6.20 register offsets
>   phy: qcom-qmp: qserdes-txrx: Add v6.20 register offsets
>   phy: qcom-qmp: qserdes-lane-shared: Add v6 register offsets
>   phy: qcom-qmp-pcie: Add support for SM8550 g3x2 and g4x2 PCIEs
> 
>  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      | 371 ++++++++++++++++++
>  .../phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h   |  15 +
>  .../qualcomm/phy-qcom-qmp-pcs-pcie-v6_20.h    |  23 ++
>  drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h    |  16 +
>  drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h |  18 +
>  .../phy-qcom-qmp-qserdes-ln-shrd-v6.h         |  32 ++
>  .../phy-qcom-qmp-qserdes-txrx-v6_20.h         |  45 +++
>  drivers/phy/qualcomm/phy-qcom-qmp.h           |   6 +
>  8 files changed, 526 insertions(+)
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6_20.h
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6_20.h
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h
>  create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6_20.h
> 
> -- 
> 2.34.1
> 

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