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Message-Id: <20230118111704.3553542-1-abel.vesa@linaro.org>
Date: Wed, 18 Jan 2023 13:17:03 +0200
From: Abel Vesa <abel.vesa@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Rob Herring <robh@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Manivannan Sadhasivam <mani@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: [PATCH v2 1/2] dt-bindings: PCI: qcom: Add SM8550 compatible
Add the SM8550 platform to the binding.
Signed-off-by: Abel Vesa <abel.vesa@...aro.org>
---
The v1 was here:
https://lore.kernel.org/all/20221116123505.2760397-1-abel.vesa@linaro.org/
Changes since v1:
* Switched to single compatible for both PCIes (qcom,pcie-sm8550)
* dropped enable-gpios property
* dropped interconnects related properties, the power-domains properties
and resets related properties the sm8550 specific allOf:if:then
* dropped pipe_mux, phy_pipe and ref clocks from the sm8550 specific
allOf:if:then clock-names array and decreased the minItems and
maxItems for clocks property accordingly
.../devicetree/bindings/pci/qcom,pcie.yaml | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index a5859bb3dc28..78e8babd11d9 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -34,6 +34,7 @@ properties:
- qcom,pcie-sm8250
- qcom,pcie-sm8450-pcie0
- qcom,pcie-sm8450-pcie1
+ - qcom,pcie-sm8550
- qcom,pcie-ipq6018
reg:
@@ -197,6 +198,7 @@ allOf:
- qcom,pcie-sm8250
- qcom,pcie-sm8450-pcie0
- qcom,pcie-sm8450-pcie1
+ - qcom,pcie-sm8550
then:
properties:
reg:
@@ -611,6 +613,40 @@ allOf:
items:
- const: pci # PCIe core reset
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,pcie-sm8550
+ then:
+ properties:
+ clocks:
+ minItems: 8
+ maxItems: 9
+ clock-names:
+ items:
+ - const: pipe # PIPE clock
+ - const: aux # Auxiliary clock
+ - const: cfg # Configuration clock
+ - const: bus_master # Master AXI clock
+ - const: bus_slave # Slave AXI clock
+ - const: slave_q2a # Slave Q2A clock
+ - const: ddrss_sf_tbu # PCIe SF TBU clock
+ - const: aggre # Aggre NoC PCIe0 AXI clock
+ - const: cnoc_pcie_sf_axi # Config NoC PCIe1 AXI clock
+ iommus:
+ maxItems: 1
+ iommu-map:
+ maxItems: 2
+ resets:
+ minItems: 1
+ maxItems: 2
+ reset-names:
+ items:
+ - const: pci # PCIe core reset
+ - const: pcie_1_link_down_reset # PCIe link down reset
+
- if:
properties:
compatible:
@@ -694,6 +730,7 @@ allOf:
- qcom,pcie-sm8250
- qcom,pcie-sm8450-pcie0
- qcom,pcie-sm8450-pcie1
+ - qcom,pcie-sm8550
then:
oneOf:
- properties:
--
2.34.1
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