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Message-ID: <1674224201-28109-7-git-send-email-quic_srivasam@quicinc.com>
Date: Fri, 20 Jan 2023 19:46:40 +0530
From: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
To: <vkoul@...nel.org>, <agross@...nel.org>, <andersson@...nel.org>,
<robh+dt@...nel.org>, <broonie@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <quic_rohkumar@...cinc.com>,
<srinivas.kandagatla@...aro.org>, <dianders@...omium.org>,
<swboyd@...omium.org>, <judyhsiao@...omium.org>,
<alsa-devel@...a-project.org>, <quic_rjendra@...cinc.com>,
<konrad.dybcio@...ainline.org>, <mka@...omium.org>
CC: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Subject: [PATCH v4 6/7] arm64: dts: qcom: sc7280: Update qcom,adsp-pil-mode property
Add "qcom,adsp-pil-mode" property in clock nodes for herobrine
crd revision 3 board specific device tree.
This is to register clocks conditionally by differentiating ADSP
based platforms and legacy path platforms.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Tested-by: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
---
.../boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index 4def6b3..b95bfd1 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -108,6 +108,14 @@
};
};
+&lpass_aon {
+ qcom,adsp-pil-mode;
+};
+
+&lpass_core {
+ qcom,adsp-pil-mode;
+};
+
&lpass_rx_macro {
/delete-property/ power-domains;
/delete-property/ power-domain-names;
@@ -154,6 +162,10 @@
status = "okay";
};
+&lpasscc {
+ qcom,adsp-pil-mode;
+};
+
&remoteproc_adsp {
status = "okay";
};
--
2.7.4
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