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Message-ID: <1674224201-28109-5-git-send-email-quic_srivasam@quicinc.com>
Date: Fri, 20 Jan 2023 19:46:38 +0530
From: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
To: <vkoul@...nel.org>, <agross@...nel.org>, <andersson@...nel.org>,
<robh+dt@...nel.org>, <broonie@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <quic_rohkumar@...cinc.com>,
<srinivas.kandagatla@...aro.org>, <dianders@...omium.org>,
<swboyd@...omium.org>, <judyhsiao@...omium.org>,
<alsa-devel@...a-project.org>, <quic_rjendra@...cinc.com>,
<konrad.dybcio@...ainline.org>, <mka@...omium.org>
CC: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Subject: [PATCH v4 4/7] arm64: dts: qcom: sc7280: Update VA/RX/TX macro clock nodes
Update VA, RX and TX macro and lpass_tlmm clock properties and
enable them.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Tested-by: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
---
.../qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 37 ++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index 81e0f3a..0add125 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -108,6 +108,43 @@
};
};
+&lpass_rx_macro {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&lpass_va_macro>;
+
+ clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
+ status = "okay";
+};
+
+&lpass_tx_macro {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&lpass_va_macro>;
+
+ clock-names = "mclk", "npl", "macro", "dcodec", "fsgen";
+ status = "okay";
+};
+
+&lpass_va_macro {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+
+ clock-names = "mclk", "macro", "dcodec";
+ status = "okay";
+};
+
&remoteproc_adsp {
status = "okay";
};
--
2.7.4
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