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Message-ID: <1674224201-28109-6-git-send-email-quic_srivasam@quicinc.com>
Date: Fri, 20 Jan 2023 19:46:39 +0530
From: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
To: <vkoul@...nel.org>, <agross@...nel.org>, <andersson@...nel.org>,
<robh+dt@...nel.org>, <broonie@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <quic_rohkumar@...cinc.com>,
<srinivas.kandagatla@...aro.org>, <dianders@...omium.org>,
<swboyd@...omium.org>, <judyhsiao@...omium.org>,
<alsa-devel@...a-project.org>, <quic_rjendra@...cinc.com>,
<konrad.dybcio@...ainline.org>, <mka@...omium.org>
CC: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Subject: [PATCH v4 5/7] arm64: dts: qcom: sc7280: Update lpass_tlmm node
Update lpass_tlmm clock properties, as different clock sources
are required in ADSP enabled platforms.
Also update LPASS_MCC register region. This is required to avoid
memory region conflicts due to overlapping lpass_efuse Q6 regmap
region used in LPASS PIL node.
Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Tested-by: Mohammad Rafi Shaik <quic_mohs@...cinc.com>
---
.../arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
index 0add125..4def6b3 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-audioreach-wcd9385.dtsi
@@ -121,6 +121,15 @@
status = "okay";
};
+&lpass_tlmm {
+ clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
+ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+
+ clock-names = "core", "audio";
+ reg = <0 0x033c0000 0x0 0x20000>,
+ <0 0x03550000 0x0 0xa100>;
+};
+
&lpass_tx_macro {
/delete-property/ power-domains;
/delete-property/ power-domain-names;
--
2.7.4
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