linux-kernel - Re: [PATCH v8 1/8] arm64: dts: ti: k3-j721s2-main: Add support for USB

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Message-ID: <e5d7c2c4-6b99-2343-7f37-6d45e141fc0b@ti.com>
Date:   Thu, 26 Jan 2023 17:54:06 +0530
From:   Vignesh Raghavendra <vigneshr@...com>
To:     Ravi Gunasekaran <r-gunasekaran@...com>, <nm@...com>, <afd@...com>,
        <kristo@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <s-vadapalli@...com>
CC:     <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v8 1/8] arm64: dts: ti: k3-j721s2-main: Add support for
 USB



On 23/01/23 3:27 pm, Ravi Gunasekaran wrote:
> From: Aswath Govindraju <a-govindraju@...com>
> 
> Add support for single instance of USB 3.0 controller in J721S2 SoC.
> 
> Reviewed-by: Ravi Gunasekaran <r-gunasekaran@...com>
> Signed-off-by: Aswath Govindraju <a-govindraju@...com>
> Signed-off-by: Matt Ranostay <mranostay@...com>
> Link: https://lore.kernel.org/r/20221122101616.770050-2-mranostay@ti.com
> Signed-off-by: Ravi Gunasekaran <r-gunasekaran@...com>
> ---
>  arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 42 ++++++++++++++++++++++
>  1 file changed, 42 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index 8915132efcc1..c0daa75116f9 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -26,6 +26,20 @@
>  		};
>  	};
>  
> +	scm_conf: syscon@...000 {
> +		compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
> +		reg = <0x00 0x00104000 0x00 0x18000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0x00 0x00 0x00104000 0x18000>;
> +
> +		usb_serdes_mux: mux-controller@0 {

This is regression back to comments on v1. Cannot you @0 w/o reg
You also missed comments on v7:

https://lore.kernel.org/all/52f276fb-93b3-da8f-c428-05ded94d90cb@ti.com/

> +			compatible = "mmio-mux";
> +			#mux-control-cells = <1>;
> +			mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
> +		};
> +	};
> +
>  	gic500: interrupt-controller@...0000 {
>  		compatible = "arm,gic-v3";
>  		#address-cells = <2>;
> @@ -745,6 +759,34 @@
>  		};
>  	};
>  
> +	usbss0: cdns-usb@...4000 {
> +		compatible = "ti,j721e-usb";
> +		reg = <0x00 0x04104000 0x00 0x100>;
> +		clocks = <&k3_clks 360 16>, <&k3_clks 360 15>;
> +		clock-names = "ref", "lpm";
> +		assigned-clocks = <&k3_clks 360 16>; /* USB2_REFCLK */
> +		assigned-clock-parents = <&k3_clks 360 17>;
> +		power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges;
> +		dma-coherent;
> +
> +		usb0: usb@...0000 {
> +			compatible = "cdns,usb3";
> +			reg = <0x00 0x06000000 0x00 0x10000>,
> +			      <0x00 0x06010000 0x00 0x10000>,
> +			      <0x00 0x06020000 0x00 0x10000>;
> +			reg-names = "otg", "xhci", "dev";
> +			interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "host", "peripheral", "otg";
> +			maximum-speed = "super-speed";
> +			dr_mode = "otg";
> +		};
> +	};
> +
>  	main_mcan0: can@...1000 {
>  		compatible = "bosch,m_can";
>  		reg = <0x00 0x02701000 0x00 0x200>,