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Message-ID: <CAJF2gTTdQOc1XFGx6UEZ6ABYTFkX6Ott53Z1ZDzeU9e4k=SRww@mail.gmail.com> Date: Sat, 28 Jan 2023 10:47:21 +0800 From: Guo Ren <guoren@...nel.org> To: Conor Dooley <conor@...nel.org> Cc: arnd@...db.de, palmer@...osinc.com, conor.dooley@...rochip.com, apatel@...tanamicro.com, atishp@...shpatra.org, mark.rutland@....com, bjorn@...nel.org, tongtiangen@...wei.com, ajones@...tanamicro.com, andrew@...ive.com, linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org, Guo Ren <guoren@...ux.alibaba.com> Subject: Re: [PATCH V2] riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte On Sat, Jan 28, 2023 at 7:36 AM Conor Dooley <conor@...nel.org> wrote: > > Hey Guo Ren, > > On Thu, Jan 26, 2023 at 10:53:06PM -0500, guoren@...nel.org wrote: > > From: Guo Ren <guoren@...ux.alibaba.com> > > > > In commit 588a513d3425 ("arm64: Fix race condition on PG_dcache_clean > > in __sync_icache_dcache()"), we found RISC-V has the same issue as the > > previous arm64. The previous implementation didn't guarantee the correct > > sequence of operations, which means flush_icache_all() hasn't been > > called when the PG_dcache_clean was set. That would cause a risk of page > > synchronization. > > > > Fixes: 08f051eda33b ("RISC-V: Flush I$ when making a dirty page executable") > > Signed-off-by: Guo Ren <guoren@...ux.alibaba.com> > > Signed-off-by: Guo Ren <guoren@...nel.org> > > --- > > Changelog: > > V2: > > - Optimize commit log > > Probably would have benefited from providing the analysis that the arm64 > commit did, for riscv, rather than referring to theirs. Maybe you are right, but they are almost the same for this patch. So I didn't want to duplicate the commit log but gave out the original instead. > But that's not really important and the diff itself seems sound, so: > Reviewed-by: Conor Dooley <conor.dooley@...rochip.com> Thx. > > Thanks, > Conor. > > > - Rebase on riscv for-next (20230127) > > > > V1: > > https://lore.kernel.org/linux-riscv/20221023133205.3493564-2-guoren@kernel.org/ > > --- > > arch/riscv/mm/cacheflush.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c > > index 3cc07ed45aeb..fcd6145fbead 100644 > > --- a/arch/riscv/mm/cacheflush.c > > +++ b/arch/riscv/mm/cacheflush.c > > @@ -90,8 +90,10 @@ void flush_icache_pte(pte_t pte) > > if (PageHuge(page)) > > page = compound_head(page); > > > > - if (!test_and_set_bit(PG_dcache_clean, &page->flags)) > > + if (!test_bit(PG_dcache_clean, &page->flags)) { > > flush_icache_all(); > > + set_bit(PG_dcache_clean, &page->flags); > > + } > > } > > #endif /* CONFIG_MMU */ > > > > -- > > 2.36.1 > > -- Best Regards Guo Ren
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