linux-kernel - RE: [PATCH 1/1] iommu/vt-d: Set No Execute Enable bit in PASID table entry

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Message-ID: <BN9PR11MB5276D8D7CF2AD32D605EFD628CCD9@BN9PR11MB5276.namprd11.prod.outlook.com>
Date:   Sat, 28 Jan 2023 07:19:15 +0000
From:   "Tian, Kevin" <kevin.tian@...el.com>
To:     Lu Baolu <baolu.lu@...ux.intel.com>,
        "iommu@...ts.linux.dev" <iommu@...ts.linux.dev>
CC:     Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>,
        "Robin Murphy" <robin.murphy@....com>,
        "Raj, Ashok" <ashok.raj@...el.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 1/1] iommu/vt-d: Set No Execute Enable bit in PASID table
 entry

> From: Lu Baolu <baolu.lu@...ux.intel.com>
> Sent: Thursday, January 26, 2023 5:55 PM
> 
> Setup No Execute Enable bit (Bit 133) of a scalable mode PASID
> entry. It is required when XD bit of the first level page table
> entry is about to be set.

"is about to set" sounds like the NXE bit is set conditionally when
certain event happens. But the actual definition of NXE bit is to
allow the use of XD bit of the first level page table.

With the comment fixed:

Reviewed-by: Kevin Tian <kevin.tian@...el.com>