linux-kernel - Re: [PATCH 1/1] iommu/vt-d: Set No Execute Enable bit in PASID table entry

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Message-ID: <ecef3c86-2f35-9f51-23c1-8e317c1afde6@linux.intel.com>
Date:   Sat, 28 Jan 2023 15:42:41 +0800
From:   Baolu Lu <baolu.lu@...ux.intel.com>
To:     "Tian, Kevin" <kevin.tian@...el.com>,
        "iommu@...ts.linux.dev" <iommu@...ts.linux.dev>
Cc:     baolu.lu@...ux.intel.com, Joerg Roedel <joro@...tes.org>,
        Will Deacon <will@...nel.org>,
        Robin Murphy <robin.murphy@....com>,
        "Raj, Ashok" <ashok.raj@...el.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] iommu/vt-d: Set No Execute Enable bit in PASID table
 entry

On 2023/1/28 15:19, Tian, Kevin wrote:
>> From: Lu Baolu<baolu.lu@...ux.intel.com>
>> Sent: Thursday, January 26, 2023 5:55 PM
>>
>> Setup No Execute Enable bit (Bit 133) of a scalable mode PASID
>> entry. It is required when XD bit of the first level page table
>> entry is about to be set.
> "is about to set" sounds like the NXE bit is set conditionally when
> certain event happens. But the actual definition of NXE bit is to
> allow the use of XD bit of the first level page table.
> 
> With the comment fixed:
> 
> Reviewed-by: Kevin Tian<kevin.tian@...el.com>

Updated. Thank you, Kevin.

Best regards,
baolu