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Message-ID: <9c2c0e88-41d8-f9ec-d934-2d1752696b1a@kernel.org>
Date:   Fri, 3 Feb 2023 13:32:21 +0100
From:   Krzysztof Kozlowski <krzk@...nel.org>
To:     Jian Yang (杨戬) <Jian.Yang@...iatek.com>,
        "robh@...nel.org" <robh@...nel.org>,
        Jianjun Wang (王建军) 
        <Jianjun.Wang@...iatek.com>, "kw@...ux.com" <kw@...ux.com>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "lpieralisi@...nel.org" <lpieralisi@...nel.org>,
        Ryder Lee <Ryder.Lee@...iatek.com>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        Jieyy Yang (杨洁) <Jieyy.Yang@...iatek.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Chuanjia Liu (柳传嘉) 
        <Chuanjia.Liu@...iatek.com>,
        Qizhong Cheng (程啟忠) 
        <Qizhong.Cheng@...iatek.com>,
        Project_Global_Chrome_Upstream_Group 
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        Rex-BC Chen (陳柏辰) 
        <Rex-BC.Chen@...iatek.com>,
        David-YH Chiu (邱鈺翔) 
        <David-YH.Chiu@...iatek.com>
Subject: Re: [PATCH 2/2] dt-bindings: PCI: mediatek-gen3: Add support for
 controlling power and reset

On 03/02/2023 10:38, Jian Yang (杨戬) wrote:
>>> +  pcie12v-supply:
>>> +    description:
>>> +      The regulator phandle that provides 12V power to downstream
>>> component.
>>> +
>>> +  dsc-reset-gpios:
>>> +    description:
>>> +      The reset GPIO of a downstream component.
>>
>> Why you cannot use standard reset-gpios property?
> 
> The "dsc-reset-gpios" represents an extra reset pin other than PERST#
> required by a PCIe downstream device. But the "reset-gpios", described
> in "pci.txt", represents the PERST#. So I tend to add a new property to
> meet this requirement.

OK

>>
>>> +    description:
>>> +      The delay time between assertion and de-assertion of a
>>> downstream
>>> +      component's reset GPIO.
>>
>> Why this should be a property of DT?
> 
> Same as the reason I described above. I suppose we need to add a
> property to let user determine the delay time due to differences
> in requirements between various devices.

No, I don't think we want individual properties like that. There is
ongoing discussion about this:
https://lore.kernel.org/all/20221214095342.937303-1-alexander.stein@ew.tq-group.com/

Feedback is welcomed - there. Don't create your own half-baked delays
for different hardware designs.

Best regards,
Krzysztof

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