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Message-ID: <20230206124451.11532a04@canb.auug.org.au>
Date:   Mon, 6 Feb 2023 12:44:51 +1100
From:   Stephen Rothwell <sfr@...b.auug.org.au>
To:     Christoffer Dall <cdall@...columbia.edu>,
        Marc Zyngier <maz@...nel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will@...nel.org>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux Next Mailing List <linux-next@...r.kernel.org>,
        Mark Brown <broonie@...nel.org>,
        Oliver Upton <oliver.upton@...ux.dev>,
        Quentin Perret <qperret@...gle.com>
Subject: linux-next: manual merge of the kvm-arm tree with the arm64 tree

Hi all,

Today's linux-next merge of the kvm-arm tree got a conflict in:

  arch/arm64/kernel/hyp-stub.S

between commit:

  f122576f3533 ("arm64/sme: Enable host kernel to access ZT0")

from the arm64 tree and commit:

  e2d4f5ae1771 ("KVM: arm64: Introduce finalise_el2_state macro")

from the kvm-arm tree.

I fixed it up (the code modified by the former was moved by the latter,
so I applied the following merge fix patch) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging.  You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.

I hope I got this right :-)

From: Stephen Rothwell <sfr@...b.auug.org.au>
Date: Mon, 6 Feb 2023 12:40:16 +1100
Subject: [PATCH] fix up for "KVM: arm64: Introduce finalise_el2_state macro"

interacting with "arm64/sme: Enable host kernel to access ZT0"

Signed-off-by: Stephen Rothwell <sfr@...b.auug.org.au>
---
 arch/arm64/include/asm/el2_setup.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index 0bd6ed77e4a5..5f821e5c52a9 100644
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -269,6 +269,12 @@
 	orr	x0, x0, SMCR_ELx_FA64_MASK
 .Lskip_sme_fa64_\@:
 
+	// ZT0 available?
+	__check_override id_aa64smfr0 ID_AA64SMFR0_EL1_SMEver_SHIFT 4 .Linit_sme_zt0_\@ .Lskip_sme_zt0_\@
+.Linit_sme_zt0_\@:
+	orr	x0, x0, SMCR_ELx_EZT0_MASK
+.Lskip_sme_zt0_\@:
+
 	orr	x0, x0, #SMCR_ELx_LEN_MASK	// Enable full SME vector
 	msr_s	SYS_SMCR_EL2, x0		// length for EL1.
 
-- 
2.35.1

-- 
Cheers,
Stephen Rothwell

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