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Message-ID: <47f5639d-a64e-9c85-a62b-40160d02d3ff@linux.intel.com>
Date: Mon, 6 Feb 2023 09:32:00 -0500
From: "Liang, Kan" <kan.liang@...ux.intel.com>
To: Arnaldo Carvalho de Melo <acme@...nel.org>
Cc: peterz@...radead.org, mingo@...hat.com,
linux-kernel@...r.kernel.org, ak@...ux.intel.com,
eranian@...gle.com, irogers@...gle.com
Subject: Re: [PATCH V2 7/9] perf/x86/msr: Add Meteor Lake support
On 2023-02-03 3:28 p.m., Arnaldo Carvalho de Melo wrote:
> Em Fri, Feb 03, 2023 at 05:21:15PM -0300, Arnaldo Carvalho de Melo escreveu:
>> Em Thu, Feb 02, 2023 at 09:34:02AM -0500, Liang, Kan escreveu:
>>> Hi Arnaldo,
>>>
>>> On 2023-02-01 8:47 p.m., Arnaldo Carvalho de Melo wrote:
>>>> Em Wed, Jan 04, 2023 at 12:13:47PM -0800, kan.liang@...ux.intel.com escreveu:
>>>>> From: Kan Liang <kan.liang@...ux.intel.com>
>>>>>
>>>>> Meteor Lake is Intel's successor to Raptor lake. PPERF and SMI_COUNT MSRs
>>>>> are also supported.
>>>>>
>>>>> Reviewed-by: Andi Kleen <ak@...ux.intel.com>
>>>>> Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
>>>>> ---
>>>>
>>>> Did the kernel bits land upstream?
>>> Yes, the kernel part has been merged into the tip.git perf/core branch.
>>>
>>> Thanks for checking the status. There are two perf tool patches in this
>>> series, which hasn't been merged. Should I resend them?
>>
>> Lemme try cherry-picking just the tooling bits from this series.
>
Sorry, I forgot to mention it in this thread.
I sent V3 with only perf tool patches.
https://lore.kernel.org/lkml/20230202192209.1795329-1-kan.liang@linux.intel.com/
> There was a clash with:
>
> commit 3fd7a168bf51497909dbfb7347af28b5c57e74a6
> Author: Namhyung Kim <namhyung@...nel.org>
> Date: Thu Jan 26 13:36:10 2023 -0800
>
> perf script: Add 'cgroup' field for output
>
> And a minor fuzz on the first patch, I applied manually and resolved the
> conflict,
The V3 add a perf test case for the new field. Could you please apply it
as well?
Sorry for the inconvenience.
Thanks,
Kan
>
> Thanks,
>
> - Arnaldo
>
>>> Thanks,
>>> Kan
>>>>
>>>> - Arnaldo
>>>>
>>>>> No change since V1
>>>>>
>>>>> arch/x86/events/msr.c | 2 ++
>>>>> 1 file changed, 2 insertions(+)
>>>>>
>>>>> diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
>>>>> index ecced3a52668..074150d28fa8 100644
>>>>> --- a/arch/x86/events/msr.c
>>>>> +++ b/arch/x86/events/msr.c
>>>>> @@ -107,6 +107,8 @@ static bool test_intel(int idx, void *data)
>>>>> case INTEL_FAM6_RAPTORLAKE:
>>>>> case INTEL_FAM6_RAPTORLAKE_P:
>>>>> case INTEL_FAM6_RAPTORLAKE_S:
>>>>> + case INTEL_FAM6_METEORLAKE:
>>>>> + case INTEL_FAM6_METEORLAKE_L:
>>>>> if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF)
>>>>> return true;
>>>>> break;
>>>>> --
>>>>> 2.35.1
>>>>
>>
>> --
>>
>> - Arnaldo
>
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