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Message-ID: <7c8cb8c8-9e53-3c52-37c1-e6a1e165097e@collabora.com>
Date:   Tue, 7 Feb 2023 10:16:03 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Chen-Yu Tsai <wenst@...omium.org>
Cc:     mturquette@...libre.com, sboyd@...nel.org, matthias.bgg@...il.com,
        johnson.wang@...iatek.com, miles.chen@...iatek.com,
        chun-jie.chen@...iatek.com, daniel@...rotopia.org,
        fparent@...libre.com, msp@...libre.com, nfraprado@...labora.com,
        rex-bc.chen@...iatek.com, zhaojh329@...il.com,
        sam.shih@...iatek.com, edward-jw.yang@...iatek.com,
        yangyingliang@...wei.com, granquet@...libre.com,
        pablo.sun@...iatek.com, sean.wang@...iatek.com,
        chen.zhong@...iatek.com, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v1 12/45] clk: mediatek: mt8365: Convert to
 mtk_clk_simple_{probe,remove}()

Il 07/02/23 08:28, Chen-Yu Tsai ha scritto:
> On Mon, Feb 6, 2023 at 11:30 PM AngeloGioacchino Del Regno
> <angelogioacchino.delregno@...labora.com> wrote:
>>
>> Change the custom mt8365_simple_gate to be mtk_gate clocks and
>> audio clocks to be composites to be consistent with all of the
>> other MediaTek clock drivers, allowing to convert this entire
>> driver to use the common mtk_clk_simple_probe() mechanism that
>> also allows building this driver as module.
> 
> I think this would be easier to follow if it were split in half:
> the first half migrating mt8365_simple_gate to mtk_gate, and the
> second half converting to mtk_clk_simple_probe.
> 
> I assume git would generate better diffs after that.
> 
>> While at it, also perform some macro compression cleanups and
>> switch to use module_platform_driver().
> 
> This would get split in half as well. The macro cleanups go with the
> first half, and the switch to module_platform_driver goes with the
> second.
> 

I agree, entirely. Will do that on v2.

>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> ---
>>   drivers/clk/mediatek/clk-mt8365.c | 460 ++++++++----------------------
>>   1 file changed, 124 insertions(+), 336 deletions(-)
>>
>> diff --git a/drivers/clk/mediatek/clk-mt8365.c b/drivers/clk/mediatek/clk-mt8365.c
>> index 69f293497778..4bd624884b62 100644
>> --- a/drivers/clk/mediatek/clk-mt8365.c
>> +++ b/drivers/clk/mediatek/clk-mt8365.c
>> @@ -1,6 +1,7 @@
>>   // SPDX-License-Identifier: GPL-2.0
>>   /*
>>    * Copyright (C) 2022 MediaTek Inc.
>> + * Copyright (C) 2023 Collabora Ltd.
>>    */
>>
>>   #include <dt-bindings/clock/mediatek,mt8365-clk.h>
>> @@ -17,7 +18,6 @@
>>   #include "clk-gate.h"
>>   #include "clk-mtk.h"
>>   #include "clk-mux.h"
>> -#include "clk-pll.h"
> 
> This should be in the previous patch?
> 
> Could you also remove some of the other inclusions that don't get
> referenced after this patch?
> 
>>   static DEFINE_SPINLOCK(mt8365_clk_lock);
>>
>> @@ -383,31 +383,23 @@ static const char * const mbist_diag_parents[] = {
>>          "univpll2_d8"
>>   };
>>
>> -static const char * const apll_i2s0_parents[] = {
>> +static const char * const apll_i2s_parents[] = {
> 
> Misc. unmentioned change. It makes sense, but please mention it.
> 

Yes, definitely.

Thanks!
Angelo



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