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Message-ID: <C32D5495-F772-4887-9CAD-66206ECCFC3F@kernel.org>
Date:   Wed, 08 Feb 2023 23:20:10 +0000
From:   Conor Dooley <conor@...nel.org>
To:     Heiko Stuebner <heiko@...ech.de>, palmer@...osinc.com
CC:     linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        christoph.muellner@...ll.eu, ajones@...tanamicro.com,
        Heiko Stuebner <heiko.stuebner@...ll.eu>
Subject: Re: [PATCH 1/2] RISC-V: fix ordering of Zbb extension

Hey Heiko,

On 8 February 2023 22:53:27 GMT, Heiko Stuebner <heiko@...ech.de> wrote:
>From: Heiko Stuebner <heiko.stuebner@...ll.eu>
>
>As Andrew reported,
>    Zb* comes after Zi* according 27.11 "Subset Naming Convention"
>so fix the ordering accordingly.
>
>Reported-by: Andrew Jones <ajones@...tanamicro.com>
>Signed-off-by: Heiko Stuebner <heiko.stuebner@...ll.eu>

The whole "getting it wrong immediately after fixing it up" ;)

Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>

>---
> arch/riscv/kernel/cpu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
>index 420228e219f7..8400f0cc9704 100644
>--- a/arch/riscv/kernel/cpu.c
>+++ b/arch/riscv/kernel/cpu.c
>@@ -185,9 +185,9 @@ arch_initcall(riscv_cpuinfo_init);
>  * New entries to this struct should follow the ordering rules described above.
>  */
> static struct riscv_isa_ext_data isa_ext_arr[] = {
>-	__RISCV_ISA_EXT_DATA(zbb, RISCV_ISA_EXT_ZBB),
> 	__RISCV_ISA_EXT_DATA(zicbom, RISCV_ISA_EXT_ZICBOM),
> 	__RISCV_ISA_EXT_DATA(zihintpause, RISCV_ISA_EXT_ZIHINTPAUSE),
>+	__RISCV_ISA_EXT_DATA(zbb, RISCV_ISA_EXT_ZBB),
> 	__RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),
> 	__RISCV_ISA_EXT_DATA(sstc, RISCV_ISA_EXT_SSTC),
> 	__RISCV_ISA_EXT_DATA(svinval, RISCV_ISA_EXT_SVINVAL),

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