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Message-ID: <63e52846175ae_36c729428@dwillia2-xfh.jf.intel.com.notmuch>
Date:   Thu, 9 Feb 2023 09:07:18 -0800
From:   Dan Williams <dan.j.williams@...el.com>
To:     Robert Richter <rrichter@....com>,
        Alison Schofield <alison.schofield@...el.com>,
        Vishal Verma <vishal.l.verma@...el.com>,
        "Ira Weiny" <ira.weiny@...el.com>,
        Ben Widawsky <bwidawsk@...nel.org>,
        "Dan Williams" <dan.j.williams@...el.com>
CC:     Jonathan Cameron <jonathan.cameron@...wei.com>,
        Dave Jiang <dave.jiang@...el.com>,
        Robert Richter <rrichter@....com>, <linux-cxl@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH] cxl/port: Disable decoder setup for endpoints in RCD mode

Robert Richter wrote:
> In RCD mode the HDM decoder capability is optional for endpoints and
> may not exist. The HDM range registers are used instead. Since the
> driver relies on the existence of an HDM decoder capability, its
> absence will cause the initialization of a memory card to fail.
> 
> Moreover, the driver also tries to enable or reuse enabled memory
> ranges. In the worst case this may lead to a system hang due to
> disabling system memory that was previously provided and setup by
> system firmware.
> 
> To solve the issues described, disable decoder setup for RCD endpoints
> and instead rely exclusively on system firmware to enable those memory
> ranges. Decoders are used by the kernel to setup and configure CXL
> memory regions, esp. to enable and disable them. Since Hot-plug is not
> supported for devices in RCD mode, the ability to disable that memory
> by the kernel using a decoder is not a necessarily requirement,
> decoders are not needed then.
> 
> Fixes: 34e37b4c432c ("cxl/port: Enable HDM Capability after validating DVSEC Ranges")
> Signed-off-by: Robert Richter <rrichter@....com>

Does Dave's series address this problem?

https://lore.kernel.org/linux-cxl/167588394236.1155956.8466475582138210344.stgit@djiang5-mobl3.local/

...that is arranging for the driver to carry-on in the absence of the
HDM Decoder Capability.

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