linux-kernel - Re: [PATCH V2] clocksource: riscv: Patch riscv_clock_next

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Message-ID: <mhng-6fc3dd67-9502-4c46-91b8-4837116d097f@palmer-ri-x1c9a>
Date:   Thu, 09 Feb 2023 12:36:14 -0800 (PST)
From:   Palmer Dabbelt <palmer@...belt.com>
To:     Matt Evans <mev@...osinc.com>, tglx@...utronix.de
CC:     daniel.lezcano@...aro.org, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org, Atish Patra <atishp@...osinc.com>
Subject:     Re: [PATCH V2] clocksource: riscv: Patch riscv_clock_next_event() jump before first use

On Wed, 01 Feb 2023 11:49:42 PST (-0800), Matt Evans wrote:
> A static key is used to select between SBI and Sstc timer usage in
> riscv_clock_next_event(), but currently the direction is resolved
> after cpuhp_setup_state() is called (which sets the next event).  The
> first event will therefore fall through the sbi_set_timer() path; this
> breaks Sstc-only systems.  So, apply the jump patching before first
> use.
>
> Fixes: 9f7a8ff6391f ("RISC-V: Prefer sstc extension if available")
> Signed-off-by: Matt Evans <mev@...osinc.com>
> ---
>
> V1 -> V2: Commit msg tweak.
>
>  drivers/clocksource/timer-riscv.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
> index 969a552da8d2..a36d173fd6cd 100644
> --- a/drivers/clocksource/timer-riscv.c
> +++ b/drivers/clocksource/timer-riscv.c
> @@ -177,6 +177,11 @@ static int __init riscv_timer_init_dt(struct device_node *n)
>  		return error;
>  	}
>  
> +	if (riscv_isa_extension_available(NULL, SSTC)) {
> +		pr_info("Timer interrupt in S-mode is available via sstc extension\n");
> +		static_branch_enable(&riscv_sstc_available);
> +	}
> +
>  	error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
>  			 "clockevents/riscv/timer:starting",
>  			 riscv_timer_starting_cpu, riscv_timer_dying_cpu);
> @@ -184,11 +189,6 @@ static int __init riscv_timer_init_dt(struct device_node *n)
>  		pr_err("cpu hp setup state failed for RISCV timer [%d]\n",
>  		       error);
>  
> -	if (riscv_isa_extension_available(NULL, SSTC)) {
> -		pr_info("Timer interrupt in S-mode is available via sstc extension\n");
> -		static_branch_enable(&riscv_sstc_available);
> -	}
> -
>  	return error;
>  }
>  
> -- 
> 2.30.2

Reviewed-by: Palmer Dabbelt <palmer@...osinc.com>

Looks like I've taken stuff here before, but I'm also happy to have the 
clocksource folks pick this up so

Acked-by: Palmer Dabbelt <palmer@...osinc.com>

I don't think this is a particularly critical fix, as IIUC there's still 
no Sstc-only hardware in the real world.  Given how late we are I'd err 
towards putting this on for-next anyway, so I'll give the clocksource 
folks a bit more time to chime in.  Otherwise I'll put it on for-next 
before the merge window (assuming we're got an rc8 coming).

Thanks!