linux-kernel - [tip: timers/core] clocksource/drivers/riscv: Patch riscv_clock_next

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Mon, 13 Feb 2023 18:26:22 -0000
From:   "tip-bot2 for Matt Evans" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Matt Evans <mev@...osinc.com>,
        Palmer Dabbelt <palmer@...osinc.com>,
        Anup Patel <anup@...infault.org>,
        Daniel Lezcano <daniel.lezcano@...aro.org>, x86@...nel.org,
        linux-kernel@...r.kernel.org
Subject: [tip: timers/core] clocksource/drivers/riscv: Patch
 riscv_clock_next_event() jump before first use

The following commit has been merged into the timers/core branch of tip:

Commit-ID:     225b9596cb0227c1c1b1e4a836dad43595c3e61a
Gitweb:        https://git.kernel.org/tip/225b9596cb0227c1c1b1e4a836dad43595c3e61a
Author:        Matt Evans <mev@...osinc.com>
AuthorDate:    Wed, 01 Feb 2023 19:49:42 
Committer:     Daniel Lezcano <daniel.lezcano@...aro.org>
CommitterDate: Mon, 13 Feb 2023 13:10:17 +01:00

clocksource/drivers/riscv: Patch riscv_clock_next_event() jump before first use

A static key is used to select between SBI and Sstc timer usage in
riscv_clock_next_event(), but currently the direction is resolved
after cpuhp_setup_state() is called (which sets the next event).  The
first event will therefore fall through the sbi_set_timer() path; this
breaks Sstc-only systems.  So, apply the jump patching before first
use.

Fixes: 9f7a8ff6391f ("RISC-V: Prefer sstc extension if available")
Signed-off-by: Matt Evans <mev@...osinc.com>
Reviewed-by: Palmer Dabbelt <palmer@...osinc.com>
Acked-by: Palmer Dabbelt <palmer@...osinc.com>
Reviewed-by: Anup Patel <anup@...infault.org>
Link: https://lore.kernel.org/r/CDDAB2D0-264E-42F3-8E31-BA210BEB8EC1@rivosinc.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
---
 drivers/clocksource/timer-riscv.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c
index d8cb629..5f0f10c 100644
--- a/drivers/clocksource/timer-riscv.c
+++ b/drivers/clocksource/timer-riscv.c
@@ -192,6 +192,11 @@ static int __init riscv_timer_init_dt(struct device_node *n)
 		return error;
 	}
 
+	if (riscv_isa_extension_available(NULL, SSTC)) {
+		pr_info("Timer interrupt in S-mode is available via sstc extension\n");
+		static_branch_enable(&riscv_sstc_available);
+	}
+
 	error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
 			 "clockevents/riscv/timer:starting",
 			 riscv_timer_starting_cpu, riscv_timer_dying_cpu);
@@ -199,11 +204,6 @@ static int __init riscv_timer_init_dt(struct device_node *n)
 		pr_err("cpu hp setup state failed for RISCV timer [%d]\n",
 		       error);
 
-	if (riscv_isa_extension_available(NULL, SSTC)) {
-		pr_info("Timer interrupt in S-mode is available via sstc extension\n");
-		static_branch_enable(&riscv_sstc_available);
-	}
-
 	return error;
 }