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Message-ID: <ff471140-5bbb-fb64-f000-eb7ba97dd74e@arm.com>
Date:   Thu, 9 Feb 2023 13:28:11 +0000
From:   Robin Murphy <robin.murphy@....com>
To:     Rob Herring <robh@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
        Li Yang <leoyang.li@....com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: layerscape: Fix GICv3 ITS node names

On 2023-02-08 18:34, Rob Herring wrote:
> The GICv3 ITS is an MSI controller, therefore its node name should be
> 'msi-controller'.
> 
> Signed-off-by: Rob Herring <robh@...nel.org>
> ---
> Note that this exposes an issue that #msi-cells is missing. In turn, the
> use of msi-parent in PCI nodes is wrong and should be msi-map according
> to my sources (Robin M), but I have no idea what is correct there.

This is a funny one, since AIUI those "msi-parent" properties are now 
really only there for the bootloader to pick up the phandle to build a 
proper "msi-map" property[1][2]. As such, I imagine it should *probably* 
be OK to add a dummy argument so that "#msi-cells = <1>" can be 
correctly specified, however I can't claim to be an expert on these 
systems and whether there are any other bootloader behaviours that also 
need to be supported.

Thanks,
Robin.

[1] 
https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/net/fsl-mc/mc.c#L328
[2] 
https://source.denx.de/u-boot/u-boot/-/blob/master/drivers/pci/pcie_layerscape_fixup.c

>   arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 2 +-
>   arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 2 +-
>   arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 2 +-
>   arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 2 +-
>   4 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> index 1b33cabb4e14..dd1c8f60fad1 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
> @@ -131,7 +131,7 @@ gic: interrupt-controller@...0000 {
>   		interrupt-controller;
>   		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
>   					 IRQ_TYPE_LEVEL_LOW)>;
> -		its: gic-its@...0000 {
> +		its: msi-controller@...0000 {
>   			compatible = "arm,gic-v3-its";
>   			msi-controller;
>   			reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index 260d045dbd9a..6dd680fb1b22 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -123,7 +123,7 @@ gic: interrupt-controller@...0000 {
>   		#size-cells = <2>;
>   		ranges;
>   
> -		its: gic-its@...0000 {
> +		its: msi-controller@...0000 {
>   			compatible = "arm,gic-v3-its";
>   			msi-controller;
>   			reg = <0x0 0x6020000 0 0x20000>;
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
> index 348d9e3a9125..d2f5345d0560 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
> @@ -60,7 +60,7 @@ gic: interrupt-controller@...0000 {
>   		interrupt-controller;
>   		interrupts = <1 9 0x4>;
>   
> -		its: gic-its@...0000 {
> +		its: msi-controller@...0000 {
>   			compatible = "arm,gic-v3-its";
>   			msi-controller;
>   			reg = <0x0 0x6020000 0 0x20000>;
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index 50c19e8405d5..ea6a94b57aeb 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -395,7 +395,7 @@ gic: interrupt-controller@...0000 {
>   		interrupt-controller;
>   		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
>   
> -		its: gic-its@...0000 {
> +		its: msi-controller@...0000 {
>   			compatible = "arm,gic-v3-its";
>   			msi-controller;
>   			reg = <0x0 0x6020000 0 0x20000>;

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