linux-kernel - Re: [PATCH net-next v3 3/3] net: dsa: rzn1-a5psw: add vlan support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20230209145006.2b42f5a3@fixe.home>
Date:   Thu, 9 Feb 2023 14:50:06 +0100
From:   Clément Léger <clement.leger@...tlin.com>
To:     Florian Fainelli <f.fainelli@...il.com>
Cc:     Andrew Lunn <andrew@...n.ch>, Vladimir Oltean <olteanv@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Herve Codina <herve.codina@...tlin.com>,
        Miquèl Raynal <miquel.raynal@...tlin.com>,
        Milan Stevanovic <milan.stevanovic@...com>,
        Jimmy Lalande <jimmy.lalande@...com>,
        Pascal Eberhard <pascal.eberhard@...com>,
        Arun Ramadoss <Arun.Ramadoss@...rochip.com>,
        linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next v3 3/3] net: dsa: rzn1-a5psw: add vlan support

Le Wed, 8 Feb 2023 09:38:04 -0800,
Florian Fainelli <f.fainelli@...il.com> a écrit :

> > +static void a5psw_vlan_setup(struct a5psw *a5psw, int port)
> > +{
> > +	u32 reg;
> > +
> > +	/* Enable TAG always mode for the port, this is actually controlled
> > +	 * by VLAN_IN_MODE_ENA field which will be used for PVID insertion
> > +	 */
> > +	reg = A5PSW_VLAN_IN_MODE_TAG_ALWAYS;
> > +	reg <<= A5PSW_VLAN_IN_MODE_PORT_SHIFT(port);
> > +	a5psw_reg_rmw(a5psw, A5PSW_VLAN_IN_MODE, A5PSW_VLAN_IN_MODE_PORT(port),
> > +		      reg);  
> 
> If we always enable VLAN mode, which VLAN ID do switch ports not part of 
> a VLAN aware bridge get classified into?

As answered on Vladimir question, it is VLAN_IN_MODE_ENAnot always VLAN enabled as
stated by the comment above but only if VLAN_IN_MODE_ENA is set (which
is done when setting a PVID only).

> 
> > +
> > +	/* Set transparent mode for output frame manipulation, this will depend
> > +	 * on the VLAN_RES configuration mode
> > +	 */
> > +	reg = A5PSW_VLAN_OUT_MODE_TRANSPARENT;
> > +	reg <<= A5PSW_VLAN_OUT_MODE_PORT_SHIFT(port);
> > +	a5psw_reg_rmw(a5psw, A5PSW_VLAN_OUT_MODE,
> > +		      A5PSW_VLAN_OUT_MODE_PORT(port), reg);  
> 
> Sort of a follow-on to the previous question, what does transparent 
> mean? Does that mean the frames ingressing with a certain VLAN tag will 
> egress with the same VLAN tag in the absence of a VLAN configuration 
> rewriting the tag?

Yes, here is an excerpt of the documentation which should clarified your
question (VLAN Table is actually stored in VLAN_RES registers):

- If frame’s VLAN id is found in the VLAN table (see Section
4.5.3.9(3)(b), VLAN Domain Resolution / VLAN Table) and the port is
defined as tagged for the VLAN, the frame is not modified.

- If frame’s VLAN id is found in the VLAN table and the port is defined
as untagged for the VLAN, the first VLAN tag is removed from the frame.

- If frame’s VLAN id is not found in the VLAN table, the frame is not
modified.

Thanks,

-- 
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com