linux-kernel - Re: [PATCH v5 2/5] arm64: dts: qcom: Add msm8939 SoC

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Message-ID: <Y+kfuHDMZCu1vKsA@gerhold.net>
Date:   Sun, 12 Feb 2023 18:19:52 +0100
From:   Stephan Gerhold <stephan@...hold.net>
To:     Bryan O'Donoghue <bryan.odonoghue@...aro.org>
Cc:     agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
        djakov@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, linux-arm-msm@...r.kernel.org,
        linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, benl@...areup.com,
        shawn.guo@...aro.org, fabien.parent@...aro.org, leo.yan@...aro.org,
        dmitry.baryshkov@...aro.org, Jun Nie <jun.nie@...aro.org>,
        James Willcox <jwillcox@...areup.com>,
        Joseph Gates <jgates@...areup.com>,
        Max Chen <mchen@...areup.com>, Zac Crosby <zac@...areup.com>,
        Vincent Knecht <vincent.knecht@...loo.org>
Subject: Re: [PATCH v5 2/5] arm64: dts: qcom: Add msm8939 SoC

On Sun, Feb 12, 2023 at 04:49:25PM +0000, Bryan O'Donoghue wrote:
> On 09/02/2023 13:47, Stephan Gerhold wrote:
> > > +			frame@...1000 {
> > > +				reg = <0x0b021000 0x1000>,
> > > +				      <0x0b022000 0x1000>;
> > > +				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
> > > +					     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > > +				frame-number = <0>;
> > > +			};
> > These timer interrupts are still wrong like mentioned in v3:
> > https://lore.kernel.org/linux-arm-msm/Y8fC%2FGCHfENQmBNC@gerhold.net/
> > 
> 
> Hmm.
> 
> This is a copy/paste error from 8916 which I guess we never see in our
> production system, since we use LPM to get to do idle
> 

Huh?

We had this discussion several times before and once you mentioned that
Shawn fixed this in your production kernel at some point. You just keep
forgetting to apply the same change to your upstream tree. ;)

You can either change the timer interrupt numbers or (more easily) just
fix the address to point to the timer of the other cluster (which has
the same interrupt numbers as on 8916):

On Mon, Sep 19, 2022 at 03:11:01PM +0100, Bryan O'Donoghue wrote:
> Yep Shawn found that on our internal tree.
>
> commit 91a842b81a713ede9ba76f3957e6fdd9067b5493
> Author: Shawn Guo <shawn.guo@...aro.org>
> Date:   Thu May 28 11:03:40 2020 +0800
>
>     arm64: dts: msm8939: fix base address of memory mapped timer
> 
>     The base address of memory mapped timer is changed from msm8916's
>     0xb020000 to 0xb120000 on msm8939.  Fix it, so that the timer can start
>     working as the broadcast device to wake up cpu from deep idle state.
>
>     Signed-off-by: Shawn Guo <shawn.guo@...aro.org>
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi
> b/arch/arm64/boot/dts/qcom/msm8939.dtsi
> index dde56c2197eb..907f076b9808 100644
> --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi
> @@ -1326,61 +1326,61 @@
>                         reg = <0x0b000000 0x1000>, <0x0b002000 0x1000>;
>                 };
> 
> -               timer@...0000 {
> +               timer@...0000 {
>                         #address-cells = <1>;
>                         #size-cells = <1>;
>                         ranges;
>                         compatible = "arm,armv7-timer-mem";
> -                       reg = <0xb020000 0x1000>;
> +                       reg = <0xb120000 0x1000>;
>                         clock-frequency = <19200000>;
>
> -                       frame@...1000 {
> +                       frame@...1000 {
> 
> but I see that didn't make it into my working tree