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Message-ID: <b5f5cdbc-9b4b-3c86-86f6-c3944884cd1f@linaro.org>
Date: Mon, 13 Feb 2023 00:04:36 +0000
From: Bryan O'Donoghue <bryan.odonoghue@...aro.org>
To: Stephan Gerhold <stephan@...hold.net>
Cc: agross@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
djakov@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, linux-arm-msm@...r.kernel.org,
linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, benl@...areup.com,
shawn.guo@...aro.org, fabien.parent@...aro.org, leo.yan@...aro.org,
dmitry.baryshkov@...aro.org, Jun Nie <jun.nie@...aro.org>,
James Willcox <jwillcox@...areup.com>,
Joseph Gates <jgates@...areup.com>,
Max Chen <mchen@...areup.com>, Zac Crosby <zac@...areup.com>,
Vincent Knecht <vincent.knecht@...loo.org>
Subject: Re: [PATCH v5 2/5] arm64: dts: qcom: Add msm8939 SoC
On 12/02/2023 17:19, Stephan Gerhold wrote:
> Huh?
>
> We had this discussion several times before and once you mentioned that
> Shawn fixed this in your production kernel at some point. You just keep
> forgetting to apply the same change to your upstream tree. 😉
>
> You can either change the timer interrupt numbers or (more easily) just
> fix the address to point to the timer of the other cluster (which has
> the same interrupt numbers as on 8916):
I must be getting old(er) to have no memory of that.
But you're right, we do have that in the production tree.
commit 91a842b81a713ede9ba76f3957e6fdd9067b5493
Author: Shawn Guo <shawn.guo@...aro.org>
Date: Thu May 28 11:03:40 2020 +0800
arm64: dts: msm8939: fix base address of memory mapped timer
- timer@...0000 {
+ timer@...0000 {
Which I guess explains why it works after all.
Cheers.
---
bod
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