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Message-ID: <e94c3d2c-10ab-01a6-ff41-cbca34b88fcf@linaro.org>
Date: Mon, 13 Feb 2023 10:28:08 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Changhuang Liang <changhuang.liang@...rfivetech.com>,
Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Emil Renner Berthing <kernel@...il.dk>,
Conor Dooley <conor@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Philipp Zabel <p.zabel@...gutronix.de>
Cc: Jack Zhu <jack.zhu@...rfivetech.com>,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v1 1/4] riscv: dts: starfive: jh7110: Add aon syscon node
On 10/02/2023 07:17, Changhuang Liang wrote:
> Add aon syscon node for the Starfive JH7110 SoC. It can be used by
> other modules such as DPHY.
>
> Signed-off-by: Changhuang Liang <changhuang.liang@...rfivetech.com>
> ---
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index cfbaff4ea64b..bce3e407ab60 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -251,6 +251,11 @@ soc {
> #size-cells = <2>;
> ranges;
>
> + aon_syscon: aon_syscon@...10000 {
No underscores in node names, generic node names.
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
> + compatible = "syscon";
Nope. syscon cannot be alone. Run dtbs_check before sending DTS.
Best regards,
Krzysztof
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