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Message-ID: <3fc07187-f5a0-86d1-a0fd-ba18a2baf555@linaro.org>
Date: Mon, 13 Feb 2023 10:30:22 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Changhuang Liang <changhuang.liang@...rfivetech.com>,
Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Emil Renner Berthing <kernel@...il.dk>,
Conor Dooley <conor@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Philipp Zabel <p.zabel@...gutronix.de>
Cc: Jack Zhu <jack.zhu@...rfivetech.com>,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v1 2/4] dt-bindings: phy: Add starfive,jh7110-dphy-rx
On 10/02/2023 07:17, Changhuang Liang wrote:
> Starfive SoC like the jh7110 use a MIPI D-PHY RX controller based on
> a M31 IP. Add a binding for it.
>
> Signed-off-by: Changhuang Liang <changhuang.liang@...rfivetech.com>
> ---
> .../bindings/phy/starfive,jh7110-dphy-rx.yaml | 78 +++++++++++++++++++
> 1 file changed, 78 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml b/Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml
> new file mode 100644
> index 000000000000..1c1e5c7cbee2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml
> @@ -0,0 +1,78 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-rx.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Starfive SoC MIPI D-PHY Rx Controller
> +
> +maintainers:
> + - Jack Zhu <jack.zhu@...rfivetech.com>
> + - Changhuang Liang <changhuang.liang@...rfivetech.com>
> +
> +description: |
> + The Starfive SOC has a MIPI CSI D-PHY based on M31 IP use to transfer
> + the CSI cameras data.
> +
> +properties:
> + compatible:
> + items:
Drop items
> + - const: "starfive,jh7110-dphy-rx"
Drop quotes
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + minItems: 3
Drop minItems
> + maxItems: 3
> +
> + clock-names:
> + items:
> + - const: cfg
> + - const: ref
> + - const: tx
> +
> + resets:
> + minItems: 2
Ditto
> + maxItems: 2
> +
> + starfive,aon-syscon:
> + $ref: '/schemas/types.yaml#/definitions/phandle-array'
Drop quotes
> + items:
> + items:
> + - description: phandle of AON SYSCON
> + - description: register offset
> + description: The register of dphy rx driver can be configured
> + by AON SYSCON in this property.
Can be? So does not have to? But you made it a required property....
> +
> + "#phy-cells":
> + const: 0
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - resets
> + - starfive,aon-syscon
> + - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/starfive,jh7110-crg.h>
> + #include <dt-bindings/reset/starfive,jh7110-crg.h>
> +
> + dphy@...20000 {
just phy@......
> + compatible = "starfive,jh7110-dphy-rx";
> + reg = <0x19820000 0x10000>;
> + clocks = <&ispcrg JH7110_ISPCLK_M31DPHY_CFGCLK_IN>,
> + <&ispcrg JH7110_ISPCLK_M31DPHY_REFCLK_IN>,
> + <&ispcrg JH7110_ISPCLK_M31DPHY_TXCLKESC_LAN0>;
> + clock-names = "cfg", "ref", "tx";
> + resets = <&ispcrg JH7110_ISPRST_M31DPHY_HW>,
> + <&ispcrg JH7110_ISPRST_M31DPHY_B09_ALWAYS_ON>;
> + starfive,aon-syscon = <&aon_syscon 0x00>;
> + #phy-cells = <0>;
> + };
Best regards,
Krzysztof
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