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Message-ID: <602b1c64-db73-b6e3-020c-f2b24085a986@quicinc.com>
Date:   Wed, 15 Feb 2023 12:36:21 +0530
From:   Shazad Hussain <quic_shazhuss@...cinc.com>
To:     Bartosz Golaszewski <brgl@...ev.pl>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
CC:     <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: Re: [PATCH 0/3] arm64: dts: qcom: sa8775p-ride: enable relevant QUPv3
 IPs



On 2/14/2023 9:27 PM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> 
> This enables the QUPv3 interfaces that are exposed on the sa8775p-ride
> board: I2C, SPI and the GNSS UART.
> 
> Bartosz Golaszewski (3):
>    arm64: dts: qcom: sa8775p: add the i2c node for sa8775p-ride
>    arm64: dts: qcom: sa8775p: add the SPI node for sa8775p-ride
>    arm64: dts: qcom: sa8775p: add the GNSS high-speed UART for

Hi Bartosz,
This instance is for BT HS UART , not for GNSS.
For GNSS we have uart12 (0x00A94000).

-Shazad

>      sa8775p-ride
> 
>   arch/arm64/boot/dts/qcom/sa8775p-ride.dts | 67 +++++++++++++++++++++
>   arch/arm64/boot/dts/qcom/sa8775p.dtsi     | 72 +++++++++++++++++++++++
>   2 files changed, 139 insertions(+)
> 

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