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Date:   Wed, 15 Feb 2023 06:56:59 -0800
From:   Palmer Dabbelt <palmer@...osinc.com>
To:     Conor Dooley <conor@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>
Cc:     Yanteng Si <siyanteng@...ngson.cn>, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org, linux-doc@...r.kernel.org,
        Alex Shi <alexs@...nel.org>,
        Ley Foon Tan <leyfoon.tan@...rfivetech.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Sudeep Holla <sudeep.holla@....com>,
        Conor Dooley <conor.dooley@...rochip.com>,
        Jonathan Corbet <corbet@....net>, linux-kernel@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>
Subject: Re: [PATCH v1 0/2] dt-bindings: Add a cpu-capacity property for RISC-V

On Wed, 4 Jan 2023 18:05:12 +0000, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
> 
> Hey,
> 
> Ever since RISC-V starting using generic arch topology code, the code
> paths for cpu-capacity have been there but there's no binding defined to
> actually convey the information. Defining the same property as used on
> arm seems to be the only logical thing to do, so do it.
> 
> [...]

Applied, thanks!

[1/2] dt-bindings: arm: move cpu-capacity to a shared loation
      https://git.kernel.org/palmer/c/7d2078310cbf
[2/2] dt-bindings: riscv: add a capacity-dmips-mhz cpu property
      https://git.kernel.org/palmer/c/991994509ee9

Best regards,
-- 
Palmer Dabbelt <palmer@...osinc.com>

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