linux-kernel - Re: [PATCH] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration

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Date:   Mon, 20 Feb 2023 18:20:29 +0200
From:   Roger Quadros <rogerq@...nel.org>
To:     Swapnil Jakhade <sjakhade@...ence.com>, vkoul@...nel.org,
        kishon@...nel.org, linux-phy@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Cc:     mparab@...ence.com
Subject: Re: [PATCH] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink
 configuration



On 20/02/2023 16:12, Swapnil Jakhade wrote:
> Add register sequences for PCIe + SGMII PHY multilink configuration.
> This has been validated on TI J7 platforms.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@...ence.com>

Reviewed-by: Roger Quadros <rogerq@...nel.org>