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Message-ID: <CAE-0n50tKWWPgU31dpcUo7bfJnnwjM-bNkDhFc0+e=iGkh3e_A@mail.gmail.com>
Date: Thu, 23 Feb 2023 13:59:31 -0500
From: Stephen Boyd <swboyd@...omium.org>
To: Mohammad Rafi Shaik <quic_mohs@...cinc.com>, agross@...nel.org,
andersson@...nel.org, broonie@...nel.org,
konrad.dybcio@...ainline.org, krzysztof.kozlowski+dt@...aro.org,
linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, mturquette@...libre.com,
quic_plai@...cinc.com, quic_rohkumar@...cinc.com,
quic_visr@...cinc.com, robh+dt@...nel.org
Cc: Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>
Subject: Re: [RESEND v8 4/5] clk: qcom: lpassaudiocc-sc7280: Merge AHB clocks
into lpass_aon
Quoting Mohammad Rafi Shaik (2023-02-23 02:19:30)
>
> On 2/16/2023 11:01 AM, Stephen Boyd wrote:
> > Quoting Mohammad Rafi Shaik (2023-02-15 07:13:29)
> >> @@ -828,8 +830,9 @@ static int lpass_aon_cc_sc7280_probe(struct platform_device *pdev)
> >> if (of_property_read_bool(pdev->dev.of_node, "qcom,adsp-pil-mode")) {
> >> lpass_audio_cc_sc7280_regmap_config.name = "cc";
> >> desc = &lpass_cc_sc7280_desc;
> >> - ret = qcom_cc_probe(pdev, desc);
> >> - goto exit;
> >> + ret = qcom_cc_probe_by_index(pdev, 1, desc);
> > Where is the patch to the binding yaml file?
> Thanks for comment.
>
> The dtbinding yaml file for this is already present in existing yaml.
>
> Below is the snippet for the same:
>
> compatible = "qcom,sc7280-lpassaoncc";
> reg = <0x3380000 0x30000>;
>
> Actually what ever the CC register region <required range is 0x3389000
> 0x24> which we are accessing is already present in the above reg map
> range of dtsi, so we have not updated the
> /devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml file.
>
The usage of '1' in qcom_cc_probe_by_index() means that the reg property
should have at least two addresses. The example you pasted above shows
only one reg address. The binding needs an update for two registers,
where is that?
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