[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <mhng-8b4fc148-76c1-4dae-b5ab-34f218e7ffe6@palmer-ri-x1c9a>
Date: Mon, 06 Mar 2023 14:48:33 -0800 (PST)
From: Palmer Dabbelt <palmer@...belt.com>
To: sboyd@...nel.org
CC: mr.bossman075@...il.com, linux-riscv@...ts.infradead.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
Mr.Bossman075@...il.com, ustcymgu@...il.com, damien.lemoal@....com,
mturquette@...libre.com, wbx@...nadk.org, aou@...s.berkeley.edu,
Paul Walmsley <paul.walmsley@...ive.com>,
Conor Dooley <conor.dooley@...rochip.com>, lkp@...el.com
Subject: Re: [PATCH v3 1/3] clk: k210: remove an implicit 64-bit division
On Mon, 06 Mar 2023 14:41:11 PST (-0800), sboyd@...nel.org wrote:
> Quoting Jesse Taube (2023-02-28 16:26:55)
>> From: Conor Dooley <conor.dooley@...rochip.com>
>>
>> The K210 clock driver depends on SOC_CANAAN, which is only selectable
>> when !MMU on RISC-V. !MMU is not possible on 32-bit yet, but patches
>> have been sent for its enabling. The kernel test robot reported this
>> implicit 64-bit division there.
>>
>> Replace the implicit division with an explicit one.
>>
>> Reported-by: kernel test robot <lkp@...el.com>
>> Link: https://lore.kernel.org/linux-riscv/202301201538.zNlqgE4L-lkp@intel.com/
>> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
>> Signed-off-by: Jesse Taube <Mr.Bossman075@...il.com>
>> ---
>
> Seems better to merge this one-liner earlier to unblock 32-bit.
>
> Applied to clk-fixes
Thanks!
Powered by blists - more mailing lists