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Date:   Tue, 7 Mar 2023 09:43:36 +0800
From:   Guo Samin <samin.guo@...rfivetech.com>
To:     Emil Renner Berthing <emil.renner.berthing@...onical.com>
CC:     <linux-riscv@...ts.infradead.org>, <netdev@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        "David S . Miller" <davem@...emloft.net>,
        Eric Dumazet <edumazet@...gle.com>,
        "Jakub Kicinski" <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Emil Renner Berthing <kernel@...il.dk>,
        Richard Cochran <richardcochran@...il.com>,
        Andrew Lunn <andrew@...n.ch>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Peter Geis <pgwipeout@...il.com>,
        Yanhong Wang <yanhong.wang@...rfivetech.com>
Subject: Re: [PATCH v5 11/12] riscv: dts: starfive: visionfive-2-v1.2a: Add
 gmac+phy's delay configuration



在 2023/3/6 21:00:19, Emil Renner Berthing 写道:
> On Fri, 3 Mar 2023 at 10:01, Samin Guo <samin.guo@...rfivetech.com> wrote:
>> v1.2A gmac0 uses motorcomm YT8531(rgmii-id) PHY, and needs delay
>> configurations.
>>
>> v1.2A gmac1 uses motorcomm YT8512(rmii) PHY, and needs to
>> switch rx and rx to external clock sources.
>>
>> Signed-off-by: Samin Guo <samin.guo@...rfivetech.com>
>> ---
>>  .../starfive/jh7110-starfive-visionfive-2-v1.2a.dts | 13 +++++++++++++
>>  1 file changed, 13 insertions(+)
>>
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>> index 4af3300f3cf3..205a13d8c8b1 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-v1.2a.dts
>> @@ -11,3 +11,16 @@
>>         model = "StarFive VisionFive 2 v1.2A";
>>         compatible = "starfive,visionfive-2-v1.2a", "starfive,jh7110";
>>  };
>> +
>> +&gmac1 {
>> +       phy-mode = "rmii";
>> +       assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
>> +                         <&syscrg JH7110_SYSCLK_GMAC1_RX>;
>> +       assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
>> +                                <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
>> +};
>> +
>> +&phy0 {
>> +       rx-internal-delay-ps = <1900>;
>> +       tx-internal-delay-ps = <1350>;
>> +};
> 
> Here you're not specifying the internal delays for phy1 which means it
> defaults to 1950ps for both rx and tx. Is that right or did you mean
> to set them to 0 like the v1.3b phy1?

Hi, emil, usually, only 1000M (rgmii) needs to configure the delay, and 100M(rmii) does not.
> 
> Also your u-boot seems to set what the linux phy driver calls
> motorcomm,keep-pll-enabled and motorcomm,auto-sleep-disabled for all
> the phys. Did you leave those out on purpose?

Hi, Emil, We did configure motorcomm,auto-sleep-disabled for yt8512 in uboot, 
but Yutai upstream's Linux driver only yt8521/yt8531 supports this property. 
Yt8512 is a Generic PHY driver and does not support the configuration of 
motorcomm,auto-sleep-disabled and motorcomm,keep-pll-enabled.

And without configuring these two attributes, vf2-1.2a gmac1 also works normally.


Best regards,
Samin
> 
>> --
>> 2.17.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@...ts.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv

-- 
Best regards,
Samin

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