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Message-ID: <8e0f39e8-0671-3f54-f083-d09169fc903b@linaro.org>
Date: Wed, 8 Mar 2023 10:58:59 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Neil Armstrong <neil.armstrong@...aro.org>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Abel Vesa <abel.vesa@...aro.org>,
Sai Prakash Ranjan <quic_saipraka@...cinc.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] arm64: dts: qcom: sm8550: misc style fixes
On 8.03.2023 09:32, Neil Armstrong wrote:
> Miscellaneous DT fixes to remove spurious blank line and enhance readability.
>
> Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi")
> Fixes: d7da51db5b81 ("arm64: dts: qcom: sm8550: add display hardware devices")
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
> arch/arm64/boot/dts/qcom/sm8550.dtsi | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> index c25c68257412..6208a6196090 100644
> --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
> @@ -412,7 +412,6 @@ xbl_sc_mem: xbl-sc-region@...00000 {
> no-map;
> };
>
> -
> hyp_tags_reserved_mem: hyp-tags-reserved-region@...d0000 {
> reg = <0 0x811d0000 0 0x30000>;
> no-map;
> @@ -2210,7 +2209,8 @@ mdss_dsi0: dsi@...4000 {
>
> assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,
> <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
> - assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
> + assigned-clock-parents = <&mdss_dsi0_phy 0>,
> + <&mdss_dsi0_phy 1>;
>
> operating-points-v2 = <&mdss_dsi_opp_table>;
>
> @@ -2302,8 +2302,10 @@ mdss_dsi1: dsi@...6000 {
>
> power-domains = <&rpmhpd SM8550_MMCX>;
>
> - assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
> - assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>;
> + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,
> + <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
> + assigned-clock-parents = <&mdss_dsi1_phy 0>,
> + <&mdss_dsi1_phy 1>;
>
> operating-points-v2 = <&mdss_dsi_opp_table>;
>
> @@ -3171,7 +3173,7 @@ apps_smmu: iommu@...00000 {
>
> intc: interrupt-controller@...00000 {
> compatible = "arm,gic-v3";
> - reg = <0 0x17100000 0 0x10000>, /* GICD */
> + reg = <0 0x17100000 0 0x10000>, /* GICD */
> <0 0x17180000 0 0x200000>; /* GICR * 8 */
> ranges;
> #interrupt-cells = <3>;
>
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