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Message-ID: <ZAx5s9tXiwFi50N9@Asurada-Nvidia>
Date: Sat, 11 Mar 2023 04:53:07 -0800
From: Nicolin Chen <nicolinc@...dia.com>
To: Jason Gunthorpe <jgg@...dia.com>
CC: Robin Murphy <robin.murphy@....com>, <will@...nel.org>,
<eric.auger@...hat.com>, <kevin.tian@...el.com>,
<baolu.lu@...ux.intel.com>, <joro@...tes.org>,
<shameerali.kolothum.thodi@...wei.com>, <jean-philippe@...aro.org>,
<linux-arm-kernel@...ts.infradead.org>, <iommu@...ts.linux.dev>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 14/14] iommu/arm-smmu-v3: Add
arm_smmu_cache_invalidate_user
On Sat, Mar 11, 2023 at 03:56:56AM -0800, Nicolin Chen wrote:
> I recall that one difficulty is to pass the vSID from the guest
> down to the host kernel driver and to link with the pSID. What I
> did previously for VCMDQ was to set the SID_MATCH register with
> iommu_group_id(group) and set the SID_REPLACE register with the
> pSID. Then hyper will use the iommu_group_id to search for the
> pair of the registers, and to set vSID. Perhaps we should think
> of something smarter.
I just found that the CFGI_STE command has the SID field, yet
we just didn't pack it in the data structure for a hwpt_alloc
ioctl. So, perhaps it isn't that difficult at all. I'll try a
bit of a test run next week.
Thanks
Nic
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