linux-kernel - Re: [PATCH v5 11/21] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator

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Message-ID: <8e2f923a-34d6-e188-c845-471d4ef5acc1@starfivetech.com>
Date:   Tue, 14 Mar 2023 22:09:27 +0800
From:   Hal Feng <hal.feng@...rfivetech.com>
To:     Emil Renner Berthing <emil.renner.berthing@...onical.com>
CC:     Conor Dooley <conor@...nel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        Stephen Boyd <sboyd@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        "Philipp Zabel" <p.zabel@...gutronix.de>,
        Rob Herring <robh+dt@...nel.org>,
        "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Ben Dooks <ben.dooks@...ive.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        "Marc Zyngier" <maz@...nel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 11/21] dt-bindings: clock: Add StarFive JH7110 system
 clock and reset generator

On Mon, 13 Mar 2023 09:53:01 +0100, Emil Renner Berthing wrote:
> On Mon, 13 Mar 2023 at 04:22, Hal Feng <hal.feng@...rfivetech.com> wrote:
>> On Sat, 11 Mar 2023 13:11:38 +0000, Conor Dooley wrote:
>> > On Sat, Mar 11, 2023 at 05:07:23PM +0800, Hal Feng wrote:
>> >> From: Emil Renner Berthing <kernel@...il.dk>
>> >>
>> >> Add bindings for the system clock and reset generator (SYSCRG) on the
>> >> JH7110 RISC-V SoC by StarFive Ltd.
>> >>
>> >> Signed-off-by: Emil Renner Berthing <kernel@...il.dk>
>> >> Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
>> >> ---
>> >>  .../clock/starfive,jh7110-syscrg.yaml         | 104 +++++++++
>> >>  MAINTAINERS                                   |   8 +-
>> >>  .../dt-bindings/clock/starfive,jh7110-crg.h   | 203 ++++++++++++++++++
>> >>  .../dt-bindings/reset/starfive,jh7110-crg.h   | 142 ++++++++++++
>> >>  4 files changed, 454 insertions(+), 3 deletions(-)
>> >>  create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>> >>  create mode 100644 include/dt-bindings/clock/starfive,jh7110-crg.h
>> >>  create mode 100644 include/dt-bindings/reset/starfive,jh7110-crg.h
>> >>
>> >> diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>> >> new file mode 100644
>> >> index 000000000000..84373ae31644
>> >> --- /dev/null
>> >> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>> >
>> >> +  clock-names:
>> >> +    oneOf:
>> >> +      - items:
>> >> +          - const: osc
>> >> +          - enum:
>> >> +              - gmac1_rmii_refin
>> >> +              - gmac1_rgmii_rxin
>> >> +          - const: i2stx_bclk_ext
>> >> +          - const: i2stx_lrck_ext
>> >> +          - const: i2srx_bclk_ext
>> >> +          - const: i2srx_lrck_ext
>> >> +          - const: tdm_ext
>> >> +          - const: mclk_ext
>> >> +
>> >> +      - items:
>> >> +          - const: osc
>> >> +          - const: gmac1_rmii_refin
>> >> +          - const: gmac1_rgmii_rxin
>> >> +          - const: i2stx_bclk_ext
>> >> +          - const: i2stx_lrck_ext
>> >> +          - const: i2srx_bclk_ext
>> >> +          - const: i2srx_lrck_ext
>> >> +          - const: tdm_ext
>> >> +          - const: mclk_ext
>> >
>> > Assuming nothing else here is optional,
>> > Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
>>
>> Yeah, nothing else here is optional. Thanks for your review.
> 
> Wait, what kind of optional are we talking about here? Surely all the
> i2s and tdm external clocks are optional in the sense that you don't
> need them on a board that never does any audio processing.

I think the "optional" means whether the clock is optional in the sense
that we run all functions on the SoC.

Best regards,
Hal