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Message-ID: <ZBFSO8WMLC7/5S8q@gondor.apana.org.au>
Date:   Wed, 15 Mar 2023 13:06:03 +0800
From:   Herbert Xu <herbert@...dor.apana.org.au>
To:     "Harsha, Harsha" <harsha.harsha@....com>
Cc:     "davem@...emloft.net" <davem@...emloft.net>,
        "linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "michals@...inx.com" <michals@...inx.com>,
        "saratcha@...inx.com" <saratcha@...inx.com>,
        "git (AMD-Xilinx)" <git@....com>,
        "Shah, Dhaval (CPG-PSAV)" <dhaval.r.shah@....com>
Subject: Re: [PATCH 3/4] crypto: xilinx: Add ZynqMP RSA driver

On Wed, Mar 15, 2023 at 05:02:39AM +0000, Harsha, Harsha wrote:
>
> To perform the operation, the request goes to the RSA HW engine. Once the operation is done, the response is sent back
> via firmware and ATF to the linux driver. Meanwhile the API in the linux driver waits until the operation is complete.
> This is why the driver is synchronous and therefore the CRYPTO_ALG_ASYNC flag is not set.

But you use crypto_engine, right? That is always async regardless
of what your driver does.

Cheers,
-- 
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

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