linux-kernel - Re: [PATCH 4/5] arm64: dts: rockchip: fix gmac support for NanoPi R5S

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <CA+E=qVei7T4T0FWhdUFnr5JbCWSgFbGLcmU2OHxx54yvnNR6mw@mail.gmail.com>
Date:   Wed, 15 Mar 2023 17:16:30 -0700
From:   Vasily Khoruzhick <anarsoul@...il.com>
To:     Tianling Shen <cnsztl@...il.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Heiko Stuebner <heiko@...ech.de>,
        Jagan Teki <jagan@...rulasolutions.com>,
        Peter Geis <pgwipeout@...il.com>, Andy Yan <andyshrk@....com>,
        Brian Norris <briannorris@...omium.org>,
        Chris Morgan <macromorgan@...mail.com>,
        Sebastian Reichel <sebastian.reichel@...labora.com>,
        Andrew Lunn <andrew@...n.ch>,
        Michael Riesch <michael.riesch@...fvision.net>,
        Maya Matuszczyk <maccraft123mc@...il.com>,
        Andrew Powers-Holmes <aholmes@...om.net>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/5] arm64: dts: rockchip: fix gmac support for NanoPi R5S

On Wed, Mar 15, 2023 at 9:02 AM Tianling Shen <cnsztl@...il.com> wrote:
>
> - Changed phy-mode to rgmii.
>
> - Fixed pull type in pinctrl for gmac0.
>
> - Removed duplicate properties in mdio node.
>   These properties are defined in the gmac0 node already.
>
> Signed-off-by: Tianling Shen <cnsztl@...il.com>
> ---
>  arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts | 7 ++-----
>  1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
> index e9adf5e66529..2a1118f15c29 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5s.dts
> @@ -57,7 +57,7 @@
>         assigned-clock-rates = <0>, <125000000>;
>         clock_in_out = "output";
>         phy-handle = <&rgmii_phy0>;
> -       phy-mode = "rgmii-id";
> +       phy-mode = "rgmii";
>         pinctrl-names = "default";
>         pinctrl-0 = <&gmac0_miim
>                      &gmac0_tx_bus2
> @@ -79,9 +79,6 @@
>                 reg = <1>;
>                 pinctrl-0 = <&eth_phy0_reset_pin>;
>                 pinctrl-names = "default";
> -               reset-assert-us = <10000>;
> -               reset-deassert-us = <50000>;
> -               reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;

Hmm, I don't see RK_PC4 being used anywhere else. gmac0 has RK_PC5 as
snsp,reset-gpio. So it essentially drops reset for the PHY. Is it
expected?

>         };
>  };
>
> @@ -115,7 +112,7 @@
>  &pinctrl {
>         gmac0 {
>                 eth_phy0_reset_pin: eth-phy0-reset-pin {
> -                       rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>;
> +                       rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
>                 };
>         };
>
> --
> 2.17.1
>