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Message-ID: <CAHp75Ve325yfz1P4=vYndUOhV-VkqNCWVEObm1RURbKHgcLKrw@mail.gmail.com>
Date: Mon, 20 Mar 2023 19:06:53 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Chester Lin <clin@...e.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
NXP S32 Linux Team <s32@....com>,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Ghennadi Procopciuc <Ghennadi.Procopciuc@....nxp.com>,
Andrei Stefanescu <andrei.stefanescu@....com>,
Radu Pirea <radu-nicolae.pirea@....com>,
Andreas Färber <afaerber@...e.de>,
Matthias Brugger <mbrugger@...e.com>
Subject: Re: [PATCH v2 3/4] pinctrl: s32cc: refactor pin config parsing
On Mon, Mar 20, 2023 at 6:39 PM Chester Lin <clin@...e.com> wrote:
>
> Move common codes into smaller inline functions and remove some argument
> handlings that are not actually used by either S32 MSCR register or generic
> config params.
...
> case PIN_CONFIG_OUTPUT_ENABLE:
> - if (arg)
> - *config |= S32_MSCR_OBE;
> - else
> - *config &= ~S32_MSCR_OBE;
> + *config |= S32_MSCR_OBE;
> *mask |= S32_MSCR_OBE;
> break;
> case PIN_CONFIG_INPUT_ENABLE:
> - if (arg)
> - *config |= S32_MSCR_IBE;
> - else
> - *config &= ~S32_MSCR_IBE;
> + *config |= S32_MSCR_IBE;
> *mask |= S32_MSCR_IBE;
> break;
Isn't it a regression here?
Otherwise needs an explicit explanation in the commit message on
what's going on here and why it's not a regression.
...
> case PIN_CONFIG_BIAS_DISABLE:
> - *config &= ~(S32_MSCR_PUS | S32_MSCR_PUE);
> - *mask |= S32_MSCR_PUS | S32_MSCR_PUE;
> + s32_pin_set_pull(param, mask, config);
> break;
This now can be unified with PU and PD cases above.
--
With Best Regards,
Andy Shevchenko
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