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Message-Id: <20230327195605.2854123-2-elder@linaro.org>
Date: Mon, 27 Mar 2023 14:56:04 -0500
From: Alex Elder <elder@...aro.org>
To: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
andersson@...nel.org, agross@...nel.org, konrad.dybcio@...aro.org
Cc: quic_rohiagar@...cinc.com, caleb.connolly@...aro.org,
mka@...omium.org, evgreen@...omium.org, quic_cpratapa@...cinc.com,
quic_avuyyuru@...cinc.com, quic_jponduru@...cinc.com,
quic_subashab@...cinc.com, elder@...nel.org,
devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, Krzysztof Kozlowski <krzk@...nel.org>
Subject: [PATCH v3 1/2] ARM: dts: qcom: sdx65: add IPA information
Add IPA-related nodes and definitions to "sdx65.dtsi". The SMP2P
nodes (ipa_smp2p_out and ipa_smp2p_in) are already present.
Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust
Zone on this platform.
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Reviewed-by: Krzysztof Kozlowski <krzk@...nel.org>
Tested-by: Rohit Agarwal <quic_rohiagar@...cinc.com>
Signed-off-by: Alex Elder <elder@...aro.org>
---
v3: - Use ipa@...0000 rather than ipa@...4000 for the IPA node.
v2: - Fixed an alignment issue noticed by Krzysztof.
- Moved the "iommus" property as suggested by Konrad.
arch/arm/boot/dts/qcom-sdx65-mtp.dts | 5 ++++
arch/arm/boot/dts/qcom-sdx65.dtsi | 39 ++++++++++++++++++++++++++++
2 files changed, 44 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65-mtp.dts b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
index ed98c83c141fc..72e25de0db5fc 100644
--- a/arch/arm/boot/dts/qcom-sdx65-mtp.dts
+++ b/arch/arm/boot/dts/qcom-sdx65-mtp.dts
@@ -245,6 +245,11 @@ &blsp1_uart3 {
status = "okay";
};
+&ipa {
+ qcom,gsi-loader = "skip";
+ status = "okay";
+};
+
&qpic_bam {
status = "okay";
};
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 192f9f94bc8b4..74671cc12c884 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -11,6 +11,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/interconnect/qcom,sdx65.h>
/ {
#address-cells = <1>;
@@ -299,6 +300,44 @@ tcsr_mutex: hwlock@...0000 {
#hwlock-cells = <1>;
};
+ ipa: ipa@...0000 {
+ compatible = "qcom,sdx65-ipa";
+
+ reg = <0x03f40000 0x10000>,
+ <0x03f50000 0x5000>,
+ <0x03e04000 0xfc000>;
+ reg-names = "ipa-reg",
+ "ipa-shared",
+ "gsi";
+
+ interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
+ <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "ipa",
+ "gsi",
+ "ipa-clock-query",
+ "ipa-setup-ready";
+
+ iommus = <&apps_smmu 0x5e0 0x0>,
+ <&apps_smmu 0x5e2 0x0>;
+
+ clocks = <&rpmhcc RPMH_IPA_CLK>;
+ clock-names = "core";
+
+ interconnects = <&system_noc MASTER_IPA &mc_virt SLAVE_EBI1>,
+ <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IPA_CFG>;
+ interconnect-names = "memory",
+ "config";
+
+ qcom,smem-states = <&ipa_smp2p_out 0>,
+ <&ipa_smp2p_out 1>;
+ qcom,smem-state-names = "ipa-clock-enabled-valid",
+ "ipa-clock-enabled";
+
+ status = "disabled";
+ };
+
remoteproc_mpss: remoteproc@...0000 {
compatible = "qcom,sdx55-mpss-pas";
reg = <0x04080000 0x4040>;
--
2.34.1
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