linux-kernel - Re: [PATCH] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration

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Message-ID: <ZCbjzXB3GW8siHYz@matsya>
Date:   Fri, 31 Mar 2023 19:14:45 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Swapnil Jakhade <sjakhade@...ence.com>
Cc:     kishon@...nel.org, linux-phy@...ts.infradead.org,
        linux-kernel@...r.kernel.org, mparab@...ence.com, rogerq@...nel.org
Subject: Re: [PATCH] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink
 configuration

On 20-02-23, 15:12, Swapnil Jakhade wrote:
> Add register sequences for PCIe + SGMII PHY multilink configuration.
> This has been validated on TI J7 platforms.

This fails to apply for me, can you please rebase

-- 
~Vinod