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Message-ID: <ZC03N4lTqJQWClz4@smile.fi.intel.com>
Date: Wed, 5 Apr 2023 11:54:15 +0300
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: William Breathitt Gray <william.gray@...aro.org>
Cc: Jonathan Cameron <jic23@...nel.org>,
Lars-Peter Clausen <lars@...afoo.de>,
linux-iio@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 5/5] iio: addac: stx104: Use
regmap_read_poll_timeout() for conversion poll
On Tue, Apr 04, 2023 at 10:12:02AM -0400, William Breathitt Gray wrote:
> ADC sample captures take a certain amount of time to complete after
> initiated; this conversion time range can be anywhere from 5 uSec to
> 53.68 Seconds depending on the configuration of the Analog Input Frame
> Timer register. When the conversion is in progress, the ADC Status
> register CNV bit is high. Utilize regmap_read_poll_timeout() to poll
> until the ADC conversion is completed (or timeout if more than 53.68
> Seconds passes).
...
> /* trigger ADC sample capture by writing to the 8-bit
Perhaps fix the style here while at it?
/*
* Trigger ADC sample capture by writing to the 8-bit
> * Software Strobe Register and wait for completion
> + * Range is 5 uSec to 53.68 Seconds in steps of 25 nanoseconds.
seconds (in SI the small letter is for the unit(s) of seconds).
Same for the commit message.
> + * The actual Analog Input Frame Timer time interval is calculated as:
> + * ai_time_frame_ns = ( AIFT + 1 ) * ( 25 nSec ).
nSec --> nanosecond
> + * Where 0 <= AIFT <= 2147483648.
> */
--
With Best Regards,
Andy Shevchenko
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